From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F4F1C433E2 for ; Thu, 18 Jun 2020 02:43:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3650521534 for ; Thu, 18 Jun 2020 02:43:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592448238; bh=Sp+62r1czfVEY6NOVZ4jDMPfXjcGVIulcPXjrSyusyg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=c/l7ZjQ8Sc8GI2DRlW0+ItXRv7CDSp9+ifU+kAh7i3hV6/o+Lc1vb6X5ty2OA+rxq OBdYBCIbz92pC5TRzFkkdZdNpRuAkQlD4Le3uyC6TJ+WaafL03xt0f2pOLrLbkYBcK SN6BsrcvZQLnoB6kKuvdnVdOH3ZYT4L95yTH2g4k= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728173AbgFRCn5 (ORCPT ); Wed, 17 Jun 2020 22:43:57 -0400 Received: from mail.kernel.org ([198.145.29.99]:39242 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727831AbgFRBLY (ORCPT ); Wed, 17 Jun 2020 21:11:24 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 88EC621D7E; Thu, 18 Jun 2020 01:11:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592442684; bh=Sp+62r1czfVEY6NOVZ4jDMPfXjcGVIulcPXjrSyusyg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xUj7x4qJzrHG1HajKv+J3y5zydovRimhfkSiPJS+4R4ePND9SLCI9DICJE2AiT5uR s8/cISoNfcuk5RJENlC1iF8QSkDLtYUbfLXJqTLP3wyguyrx0QFlH+VJBeLr1nclBj XBpl1XkxRfYovP3GJiNCyuzhpBTnpDaYCI062c+k= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Martin Blumenstingl , Neil Armstrong , Jerome Brunet , Sasha Levin , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 5.7 151/388] clk: meson: meson8b: Fix the first parent of vid_pll_in_sel Date: Wed, 17 Jun 2020 21:04:08 -0400 Message-Id: <20200618010805.600873-151-sashal@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200618010805.600873-1-sashal@kernel.org> References: <20200618010805.600873-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Martin Blumenstingl [ Upstream commit da1978ac3d6cf278dedf5edbf350445a0fff2f08 ] Use hdmi_pll_lvds_out as parent of the vid_pll_in_sel clock. It's not easy to see that the vendor kernel does the same, but it actually does. meson_clk_pll_ops in mainline still cannot fully recalculate all rates from the HDMI PLL registers because some register bits (at the time of writing it's unknown which bits are used for this) double the HDMI PLL output rate (compared to simply considering M, N and FRAC) for some (but not all) PLL settings. Update the vid_pll_in_sel parent so our clock calculation works for simple clock settings like the CVBS output (where no rate doubling is going on). The PLL ops need to be fixed later on for more complex clock settings (all HDMI rates). Fixes: 6cb57c678bb70 ("clk: meson: meson8b: add the read-only video clock trees") Suggested-by: Neil Armstrong Signed-off-by: Martin Blumenstingl Signed-off-by: Jerome Brunet Link: https://lore.kernel.org/r/20200417184127.1319871-2-martin.blumenstingl@googlemail.com Signed-off-by: Sasha Levin --- drivers/clk/meson/meson8b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index 34a70c4b4899..ac4a883acd2a 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -1077,7 +1077,7 @@ static struct clk_regmap meson8b_vid_pll_in_sel = { * Meson8m2: vid2_pll */ .parent_hws = (const struct clk_hw *[]) { - &meson8b_hdmi_pll_dco.hw + &meson8b_hdmi_pll_lvds_out.hw }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, -- 2.25.1