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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id 7sm4666769pgh.80.2020.06.23.16.20.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jun 2020 16:20:34 -0700 (PDT) Date: Tue, 23 Jun 2020 16:17:51 -0700 From: Bjorn Andersson To: Konrad Dybcio Cc: skrzynka@konradybcio.pl, Andy Gross , Rob Herring , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 05/12] arm64: dts: qcom: msm8994: Add SDHCI1 node Message-ID: <20200623231751.GK128451@builder.lan> References: <20200623224813.297077-1-konradybcio@gmail.com> <20200623224813.297077-6-konradybcio@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200623224813.297077-6-konradybcio@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue 23 Jun 15:48 PDT 2020, Konrad Dybcio wrote: > Enable support for SDHCI on msm8994-based devices. > > Signed-off-by: Konrad Dybcio Fixed up the indentations and applied the patch, thanks. > --- > arch/arm64/boot/dts/qcom/msm8994.dtsi | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi > index a4edc3be7024..f989530ffa90 100644 > --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi > @@ -334,6 +334,31 @@ frame@f9028000 { > }; > }; > > + sdhc1: sdhci@f9824900 { > + compatible = "qcom,sdhci-msm-v4"; > + reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>; > + reg-names = "hc_mem", "core_mem"; > + > + interrupts = , > + ; > + interrupt-names = "hc_irq", "pwr_irq"; > + > + clocks = <&gcc GCC_SDCC1_APPS_CLK>, > + <&gcc GCC_SDCC1_AHB_CLK>, > + <&xo_board>; > + clock-names = "core", "iface", "xo"; > + > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on > + &sdc1_rclk_on>; > + pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off > + &sdc1_rclk_off>; > + > + bus-width = <8>; > + non-removable; > + status = "disabled"; > + }; > + > blsp1_uart2: serial@f991e000 { > compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; > reg = <0xf991e000 0x1000>; > -- > 2.27.0 >