Re: [PATCH v2 0/1] Revert "serial: 8250: Fix max baud limit in generic 8250 port"

[Andy Shevchenko <andriy.shevchenko@linux.intel.com>]

On Thu, Jul 02, 2020 at 06:11:52AM +0200, Lukas Wunner wrote:
> On Thu, Jul 02, 2020 at 01:37:13AM +0300, Serge Semin wrote:
> > 1) Add a new capability like UART_CAP_NO16DIV and take it into account
> >    in the serial8250_get_baud_rate() method.
> >  
> > I don't have a documentation for the Mediatek UART port, but it seems to me
> > that that controller calculates the baud rate differently from the standard
> > 8250 port. A standard 8250 port does that by the next formulae:
> >   baud = uartclk / (16 * divisor).
> > While it seems to me that the Mediatek port uses the formulae like:
> >   baud = uartclk / divisor. (Please, correct me if I'm wrong)
> 
> 8250_bcm2835aux.c seems to suffer from a similar issue and
> solves it like this in the ->probe hook:
> 
> 	/* the HW-clock divider for bcm2835aux is 8,
> 	 * but 8250 expects a divider of 16,
> 	 * so we have to multiply the actual clock by 2
> 	 * to get identical baudrates.
> 	 */
> 	up.port.uartclk = clk_get_rate(data->clk) * 2;

8250_mid for example lies about UART clock due to this. It has a comment in the
code in its ->set_termios().

Yes, we have a lot of possibilities here to fix, I guess. We have custom
termios callback, also get and set divisor and so on.

-- 
With Best Regards,
Andy Shevchenko