From: Mark Brown <broonie@kernel.org>
To: Rajendra Nayak <rnayak@codeaurora.org>
Cc: bjorn.andersson@linaro.org, agross@kernel.org,
linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
mka@chromium.org, Alok Chauhan <alokc@codeaurora.org>,
Akash Asthana <akashast@codeaurora.org>
Subject: Re: [PATCH 1/3] spi: spi-qcom-qspi: Use OPP API to set clk/perf state
Date: Fri, 3 Jul 2020 18:01:57 +0100 [thread overview]
Message-ID: <20200703170157.GA54804@sirena.org.uk> (raw)
In-Reply-To: <1593769293-6354-2-git-send-email-rnayak@codeaurora.org>
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On Fri, Jul 03, 2020 at 03:11:31PM +0530, Rajendra Nayak wrote:
> QSPI needs to vote on a performance state of a power domain depending on
> the clock rate. Add support for it by specifying the perf state/clock rate
> as an OPP table in device tree.
This doesn't apply against current code, please check and resend.
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next prev parent reply other threads:[~2020-07-03 17:02 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-03 9:41 [PATCH 0/3] QSPI: Add DVFS support Rajendra Nayak
2020-07-03 9:41 ` [PATCH 1/3] spi: spi-qcom-qspi: Use OPP API to set clk/perf state Rajendra Nayak
2020-07-03 17:01 ` Mark Brown [this message]
2020-07-07 4:27 ` Rajendra Nayak
2020-07-03 9:41 ` [PATCH 2/3] arm64: dts: sdm845: Add qspi opps and power-domains Rajendra Nayak
2020-07-06 15:56 ` Matthias Kaehlcke
2020-07-03 9:41 ` [PATCH 3/3] arm64: dts: sc7180: " Rajendra Nayak
2020-07-06 15:58 ` Matthias Kaehlcke
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