From: Gage Eads <gage.eads@intel.com>
To: linux-kernel@vger.kernel.org, arnd@arndb.de, gregkh@linuxfoundation.org
Cc: magnus.karlsson@intel.com, bjorn.topel@intel.com
Subject: [PATCH 07/20] dlb2: add runtime power-management support
Date: Sun, 12 Jul 2020 08:43:18 -0500 [thread overview]
Message-ID: <20200712134331.8169-8-gage.eads@intel.com> (raw)
In-Reply-To: <20200712134331.8169-1-gage.eads@intel.com>
The driver's power-management policy is to put the device in D0 when in use
(when there are any open device files or memory mappings, or there are any
virtual devices), and leave it in D3Hot otherwise. This includes
resume/suspend callbacks; when the device resumes, the driver resets the
hardware to a known good state.
Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Magnus Karlsson <magnus.karlsson@intel.com>
---
drivers/misc/dlb2/dlb2_ioctl.c | 2 ++
drivers/misc/dlb2/dlb2_main.c | 79 +++++++++++++++++++++++++++++++++++++++++
drivers/misc/dlb2/dlb2_main.h | 2 ++
drivers/misc/dlb2/dlb2_pf_ops.c | 30 ++++++++++++++++
4 files changed, 113 insertions(+)
diff --git a/drivers/misc/dlb2/dlb2_ioctl.c b/drivers/misc/dlb2/dlb2_ioctl.c
index eef9b824b276..b36e255e8d35 100644
--- a/drivers/misc/dlb2/dlb2_ioctl.c
+++ b/drivers/misc/dlb2/dlb2_ioctl.c
@@ -197,6 +197,8 @@ static int dlb2_ioctl_get_sched_domain_fd(struct dlb2_dev *dev,
if (ret >= 0) {
kref_get(&domain->refcnt);
+ dev->ops->inc_pm_refcnt(dev->pdev, true);
+
ret = 0;
}
diff --git a/drivers/misc/dlb2/dlb2_main.c b/drivers/misc/dlb2/dlb2_main.c
index eb716587e738..8ace8e1edbcb 100644
--- a/drivers/misc/dlb2/dlb2_main.c
+++ b/drivers/misc/dlb2/dlb2_main.c
@@ -69,11 +69,21 @@ static int dlb2_open(struct inode *i, struct file *f)
f->private_data = dev;
+ dev->ops->inc_pm_refcnt(dev->pdev, true);
+
return 0;
}
static int dlb2_close(struct inode *i, struct file *f)
{
+ struct dlb2_dev *dev;
+
+ dev = container_of(f->f_inode->i_cdev, struct dlb2_dev, cdev);
+
+ dev_dbg(dev->dlb2_device, "Closing DLB device file\n");
+
+ dev->ops->dec_pm_refcnt(dev->pdev);
+
return 0;
}
@@ -120,6 +130,8 @@ int dlb2_init_domain(struct dlb2_dev *dlb2_dev, u32 domain_id)
dlb2_dev->sched_domains[domain_id] = domain;
+ dlb2_dev->ops->inc_pm_refcnt(dlb2_dev->pdev, true);
+
return 0;
}
@@ -293,6 +305,15 @@ static int dlb2_probe(struct pci_dev *pdev,
list_add(&dlb2_dev->list, &dlb2_dev_list);
mutex_unlock(&dlb2_driver_lock);
+ /*
+ * The driver puts the device to sleep (D3hot) while there are no
+ * scheduling domains to service. The usage counter of a PCI device at
+ * probe time is 2, so decrement it twice here. (The PCI layer has
+ * already called pm_runtime_enable().)
+ */
+ dlb2_dev->ops->dec_pm_refcnt(pdev);
+ dlb2_dev->ops->dec_pm_refcnt(pdev);
+
return 0;
init_driver_state_fail:
@@ -330,6 +351,10 @@ static void dlb2_remove(struct pci_dev *pdev)
list_del(&dlb2_dev->list);
mutex_unlock(&dlb2_driver_lock);
+ /* Undo the PM operations in dlb2_probe(). */
+ dlb2_dev->ops->inc_pm_refcnt(pdev, false);
+ dlb2_dev->ops->inc_pm_refcnt(pdev, false);
+
dlb2_dev->ops->free_driver_state(dlb2_dev);
dlb2_resource_free(&dlb2_dev->hw);
@@ -351,17 +376,71 @@ static void dlb2_remove(struct pci_dev *pdev)
devm_kfree(&pdev->dev, dlb2_dev);
}
+#ifdef CONFIG_PM
+static void dlb2_reset_hardware_state(struct dlb2_dev *dev)
+{
+ dlb2_reset_device(dev->pdev);
+
+ /* Reinitialize any other hardware state */
+ dev->ops->init_hardware(dev);
+}
+
+static int dlb2_runtime_suspend(struct device *dev)
+{
+ struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
+ struct dlb2_dev *dlb2_dev = pci_get_drvdata(pdev);
+
+ dev_dbg(dlb2_dev->dlb2_device, "Suspending device operation\n");
+
+ /* Return and let the PCI subsystem put the device in D3hot. */
+
+ return 0;
+}
+
+static int dlb2_runtime_resume(struct device *dev)
+{
+ struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
+ struct dlb2_dev *dlb2_dev = pci_get_drvdata(pdev);
+ int ret;
+
+ /*
+ * The PCI subsystem put the device in D0, but the device may not have
+ * completed powering up. Wait until the device is ready before
+ * proceeding.
+ */
+ ret = dlb2_dev->ops->wait_for_device_ready(dlb2_dev, pdev);
+ if (ret)
+ return ret;
+
+ dev_dbg(dlb2_dev->dlb2_device, "Resuming device operation\n");
+
+ /* Now reinitialize the device state. */
+ dlb2_reset_hardware_state(dlb2_dev);
+
+ return 0;
+}
+#endif
+
static struct pci_device_id dlb2_id_table[] = {
{ PCI_DEVICE_DATA(INTEL, DLB2_PF, DLB2_PF) },
{ 0 }
};
MODULE_DEVICE_TABLE(pci, dlb2_id_table);
+#ifdef CONFIG_PM
+static const struct dev_pm_ops dlb2_pm_ops = {
+ SET_RUNTIME_PM_OPS(dlb2_runtime_suspend, dlb2_runtime_resume, NULL)
+};
+#endif
+
static struct pci_driver dlb2_pci_driver = {
.name = (char *)dlb2_driver_name,
.id_table = dlb2_id_table,
.probe = dlb2_probe,
.remove = dlb2_remove,
+#ifdef CONFIG_PM
+ .driver.pm = &dlb2_pm_ops,
+#endif
};
static int __init dlb2_init_module(void)
diff --git a/drivers/misc/dlb2/dlb2_main.h b/drivers/misc/dlb2/dlb2_main.h
index 81795754c070..76380f0ca51b 100644
--- a/drivers/misc/dlb2/dlb2_main.h
+++ b/drivers/misc/dlb2/dlb2_main.h
@@ -41,6 +41,8 @@ struct dlb2_device_ops {
int (*map_pci_bar_space)(struct dlb2_dev *dev, struct pci_dev *pdev);
void (*unmap_pci_bar_space)(struct dlb2_dev *dev,
struct pci_dev *pdev);
+ void (*inc_pm_refcnt)(struct pci_dev *pdev, bool resume);
+ void (*dec_pm_refcnt)(struct pci_dev *pdev);
int (*init_driver_state)(struct dlb2_dev *dev);
void (*free_driver_state)(struct dlb2_dev *dev);
int (*device_create)(struct dlb2_dev *dlb2_dev,
diff --git a/drivers/misc/dlb2/dlb2_pf_ops.c b/drivers/misc/dlb2/dlb2_pf_ops.c
index ae83a2feb3f9..e4de46eccf87 100644
--- a/drivers/misc/dlb2/dlb2_pf_ops.c
+++ b/drivers/misc/dlb2/dlb2_pf_ops.c
@@ -2,11 +2,39 @@
/* Copyright(c) 2017-2020 Intel Corporation */
#include <linux/delay.h>
+#include <linux/pm_runtime.h>
#include "dlb2_main.h"
#include "dlb2_regs.h"
#include "dlb2_resource.h"
+/***********************************/
+/****** Runtime PM management ******/
+/***********************************/
+
+static void
+dlb2_pf_pm_inc_refcnt(struct pci_dev *pdev, bool resume)
+{
+ if (resume)
+ /*
+ * Increment the device's usage count and immediately wake it
+ * if it was suspended.
+ */
+ pm_runtime_get_sync(&pdev->dev);
+ else
+ pm_runtime_get_noresume(&pdev->dev);
+}
+
+static void
+dlb2_pf_pm_dec_refcnt(struct pci_dev *pdev)
+{
+ /*
+ * Decrement the device's usage count and suspend it if the
+ * count reaches zero.
+ */
+ pm_runtime_put_sync_suspend(&pdev->dev);
+}
+
/********************************/
/****** PCI BAR management ******/
/********************************/
@@ -226,6 +254,8 @@ dlb2_pf_reset_domain(struct dlb2_hw *hw, u32 id)
struct dlb2_device_ops dlb2_pf_ops = {
.map_pci_bar_space = dlb2_pf_map_pci_bar_space,
.unmap_pci_bar_space = dlb2_pf_unmap_pci_bar_space,
+ .inc_pm_refcnt = dlb2_pf_pm_inc_refcnt,
+ .dec_pm_refcnt = dlb2_pf_pm_dec_refcnt,
.init_driver_state = dlb2_pf_init_driver_state,
.free_driver_state = dlb2_pf_free_driver_state,
.device_create = dlb2_pf_device_create,
--
2.13.6
next prev parent reply other threads:[~2020-07-12 13:47 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-12 13:43 [PATCH 00/20] dlb2: introduce DLB 2.0 device driver Gage Eads
2020-07-12 13:43 ` [PATCH 01/20] dlb2: add skeleton for DLB 2.0 driver Gage Eads
2020-07-12 15:56 ` Greg KH
2020-07-17 18:19 ` Eads, Gage
2020-07-18 6:46 ` Greg KH
2020-07-12 15:58 ` Greg KH
2020-07-17 18:18 ` Eads, Gage
2020-07-18 6:46 ` Greg KH
2020-07-20 19:02 ` Eads, Gage
2020-07-20 19:19 ` Greg KH
2020-07-24 21:00 ` Eads, Gage
2020-07-12 13:43 ` [PATCH 02/20] dlb2: initialize PF device Gage Eads
2020-07-12 13:43 ` [PATCH 03/20] dlb2: add resource and device initialization Gage Eads
2020-07-12 13:43 ` [PATCH 04/20] dlb2: add device ioctl layer and first 4 ioctls Gage Eads
2020-07-12 14:42 ` Randy Dunlap
2020-07-17 18:20 ` Eads, Gage
2020-07-12 14:53 ` Randy Dunlap
2020-07-17 18:20 ` Eads, Gage
2020-07-12 15:28 ` Arnd Bergmann
2020-07-17 18:19 ` Eads, Gage
2020-07-17 18:56 ` Arnd Bergmann
2020-07-17 20:05 ` Eads, Gage
2020-07-18 6:48 ` gregkh
2020-08-04 22:20 ` Eads, Gage
2020-08-05 6:46 ` gregkh
2020-08-05 15:07 ` Eads, Gage
2020-08-05 15:17 ` gregkh
2020-08-05 15:39 ` Eads, Gage
2020-07-12 13:43 ` [PATCH 05/20] dlb2: add sched domain config and reset support Gage Eads
2020-07-12 13:43 ` [PATCH 06/20] dlb2: add ioctl to get sched domain fd Gage Eads
2020-07-12 13:43 ` Gage Eads [this message]
2020-07-12 13:43 ` [PATCH 08/20] dlb2: add queue create and queue-depth-get ioctls Gage Eads
2020-07-12 13:43 ` [PATCH 09/20] dlb2: add ioctl to configure ports, query poll mode Gage Eads
2020-07-12 15:34 ` Arnd Bergmann
2020-07-17 18:19 ` Eads, Gage
2020-07-12 13:43 ` [PATCH 10/20] dlb2: add port mmap support Gage Eads
2020-07-12 13:43 ` [PATCH 11/20] dlb2: add start domain ioctl Gage Eads
2020-07-12 13:43 ` [PATCH 12/20] dlb2: add queue map and unmap ioctls Gage Eads
2020-07-12 13:43 ` [PATCH 13/20] dlb2: add port enable/disable ioctls Gage Eads
2020-07-12 13:43 ` [PATCH 14/20] dlb2: add CQ interrupt support Gage Eads
2020-07-12 13:43 ` [PATCH 15/20] dlb2: add domain alert support Gage Eads
2020-07-12 13:43 ` [PATCH 16/20] dlb2: add sequence-number management ioctls Gage Eads
2020-07-12 13:43 ` [PATCH 17/20] dlb2: add cos bandwidth get/set ioctls Gage Eads
2020-07-12 13:43 ` [PATCH 18/20] dlb2: add device FLR support Gage Eads
2020-07-12 13:43 ` [PATCH 19/20] dlb2: add basic PF sysfs interfaces Gage Eads
2020-07-12 13:43 ` [PATCH 20/20] dlb2: add ingress error handling Gage Eads
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