Re: [PATCH net-next v6 1/4] net: phy: add USXGMII link partner ability constants

Vladimir Oltean
2020-07-15T22:44:55Z

On Wed, Jul 15, 2020 at 10:33:23PM +0200, Michael Walle wrote:
> Am 2020-07-13 20:37, schrieb Michael Walle:
> > Am 2020-07-13 20:23, schrieb Russell King - ARM Linux admin:
> > > On Thu, Jul 09, 2020 at 11:35:23PM +0200, Michael Walle wrote:
> > > > The constants are taken from the USXGMII Singleport Copper Interface
> > > > specification. The naming are based on the SGMII ones, but with
> > > > an MDIO_
> > > > prefix.
> > > >
> > > > Signed-off-by: Michael Walle <michael@walle.cc>
> > > > ---
> > > > include/uapi/linux/mdio.h | 26 ++++++++++++++++++++++++++
> > > > 1 file changed, 26 insertions(+)
> > > >
> > > > diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
> > > > index 4bcb41c71b8c..784723072578 100644
> > > > --- a/include/uapi/linux/mdio.h
> > > > +++ b/include/uapi/linux/mdio.h
> > > > @@ -324,4 +324,30 @@ static inline __u16 mdio_phy_id_c45(int
> > > > prtad, int devad)
> > > > return MDIO_PHY_ID_C45 | (prtad << 5) | devad;
> > > > }
> > > >
> > > > +/* UsxgmiiChannelInfo[15:0] for USXGMII in-band auto-negotiation.*/
> > > > +#define MDIO_LPA_USXGMII_EEE_CLK_STP 0x0080 /* EEE clock stop
> > > > supported */
> > > > +#define MDIO_LPA_USXGMII_EEE 0x0100 /* EEE supported */
> > > > +#define MDIO_LPA_USXGMII_SPD_MASK 0x0e00 /* USXGMII speed mask */
> > > > +#define MDIO_LPA_USXGMII_FULL_DUPLEX 0x1000 /* USXGMII full
> > > > duplex */
> > > > +#define MDIO_LPA_USXGMII_DPX_SPD_MASK 0x1e00 /* USXGMII duplex
> > > > and speed bits */
> > > > +#define MDIO_LPA_USXGMII_10 0x0000 /* 10Mbps */
> > > > +#define MDIO_LPA_USXGMII_10HALF 0x0000 /* 10Mbps half-duplex */
> > > > +#define MDIO_LPA_USXGMII_10FULL 0x1000 /* 10Mbps full-duplex */
> > > > +#define MDIO_LPA_USXGMII_100 0x0200 /* 100Mbps */
> > > > +#define MDIO_LPA_USXGMII_100HALF 0x0200 /* 100Mbps half-duplex */
> > > > +#define MDIO_LPA_USXGMII_100FULL 0x1200 /* 100Mbps full-duplex */
> > > > +#define MDIO_LPA_USXGMII_1000 0x0400 /* 1000Mbps */
> > > > +#define MDIO_LPA_USXGMII_1000HALF 0x0400 /* 1000Mbps half-duplex */
> > > > +#define MDIO_LPA_USXGMII_1000FULL 0x1400 /* 1000Mbps full-duplex */
> > > > +#define MDIO_LPA_USXGMII_10G 0x0600 /* 10Gbps */
> > > > +#define MDIO_LPA_USXGMII_10GHALF 0x0600 /* 10Gbps half-duplex */
> > > > +#define MDIO_LPA_USXGMII_10GFULL 0x1600 /* 10Gbps full-duplex */
> > > > +#define MDIO_LPA_USXGMII_2500 0x0800 /* 2500Mbps */
> > > > +#define MDIO_LPA_USXGMII_2500HALF 0x0800 /* 2500Mbps half-duplex */
> > > > +#define MDIO_LPA_USXGMII_2500FULL 0x1800 /* 2500Mbps full-duplex */
> > > > +#define MDIO_LPA_USXGMII_5000 0x0a00 /* 5000Mbps */
> > > > +#define MDIO_LPA_USXGMII_5000HALF 0x0a00 /* 5000Mbps half-duplex */
> > > > +#define MDIO_LPA_USXGMII_5000FULL 0x1a00 /* 5000Mbps full-duplex */
> > > > +#define MDIO_LPA_USXGMII_LINK 0x8000 /* PHY link with
> > > > copper-side partner */
> > >
> > > btw, the only thing which is missing from this is bit 0.
> >
> > TBH, I didn't know how to name it. Any suggestions?
>
> NXP calls it ABIL0, in xilinx docs its called USXGMII [1]. In the USXGMII
> spec, its "set to 1 (0 is SGMII)" which I don't understand because its
> also 1 for SGMII, right? At least as described in the tx_configReg[15:0] in
> the SGMII spec.
>
> #define MDIO_USXGMII_USXGMII 0x0001 ?
>
> -michael
>
> [1] https://www.xilinx.com/support/documentation/ip_documentation/usxgmii/v1_0/pg251-usxgmii.pdf

The explanation in the spec is quite cryptic, I've taken that to mean
"corresponds to bit 0 in SGMII". Hence the reason why, in the code I've
introduced in Felix, this is simply used as ADVERTISE_SGMII. I have no
problem in creating an alias to ADVERTISE_SGMII named
MDIO_LPA_USXGMII_SGMII. That being said, I don't see, right now, a
practical situation where you might want to parse bit 0 from LPA, it's
just like in Forrest Gump: "life is like a box of chocolates, you never
know what you're gonna get". Adding it now to the UAPI might very well
be a non-issue.

-Vladimir