From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF3E3C433E0 for ; Thu, 16 Jul 2020 23:13:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A5F342070E for ; Thu, 16 Jul 2020 23:13:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727107AbgGPXNA (ORCPT ); Thu, 16 Jul 2020 19:13:00 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:39766 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726113AbgGPXNA (ORCPT ); Thu, 16 Jul 2020 19:13:00 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1jwCQe-005W6C-L1; Fri, 17 Jul 2020 00:32:36 +0200 Date: Fri, 17 Jul 2020 00:32:36 +0200 From: Andrew Lunn To: Jakub Kicinski Cc: Matthew Hagan , Vivien Didelot , Florian Fainelli , "David S. Miller" , linux@armlinux.org.uk, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, John Crispin , Jonathan McDowell , Rob Herring , devicetree@vger.kernel.org Subject: Re: [PATCH 2/2] dt-bindings: net: dsa: qca8k: Add PORT0_PAD_CTRL properties Message-ID: <20200716223236.GA1314837@lunn.ch> References: <2e1776f997441792a44cd35a16f1e69f848816ce.1594668793.git.mnhagan88@gmail.com> <20200716150925.0f3e01b8@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200716150925.0f3e01b8@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 16, 2020 at 03:09:25PM -0700, Jakub Kicinski wrote: > On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote: > > Add names and decriptions of additional PORT0_PAD_CTRL properties. > > > > Signed-off-by: Matthew Hagan > > --- > > Documentation/devicetree/bindings/net/dsa/qca8k.txt | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt > > index ccbc6d89325d..3d34c4f2e891 100644 > > --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt > > +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt > > @@ -13,6 +13,14 @@ Optional properties: > > > > - reset-gpios: GPIO to be used to reset the whole device > > > > +Optional MAC configuration properties: > > + > > +- qca,exchange-mac0-mac6: If present, internally swaps MAC0 and MAC6. > > Perhaps we can say a little more here? > > > +- qca,sgmii-rxclk-falling-edge: If present, sets receive clock phase to > > + falling edge. > > +- qca,sgmii-txclk-falling-edge: If present, sets transmit clock phase to > > + falling edge. > > These are not something that other vendors may implement and therefore > something we may want to make generic? Andrew? I've never seen any other vendor implement this. Which to me makes me think this is a vendor extension, to Ciscos vendor extension of 1000BaseX. Matthew, do you have a real use cases of these? I don't see a DT patch making use of them. And if you do, what is the PHY on the other end which also allows you to invert the clocks? Andrew