Re: [PATCH V7 08/14] perf/x86/intel: Generic support for hardware TopDown metrics

[Peter Zijlstra <peterz@infradead.org>]

On Fri, Jul 24, 2020 at 03:10:52PM -0400, Liang, Kan wrote:

> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 6cb079e0c9d9..010ac74afc09 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -2405,27 +2405,18 @@ static u64 icl_update_topdown_event(struct
> perf_event *event)
>  	return slots;
>  }
> 
> -static void intel_pmu_read_topdown_event(struct perf_event *event)
> +static void intel_pmu_read_event(struct perf_event *event)
>  {
> -	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> -
> -	/* Only need to call update_topdown_event() once for group read. */
> -	if ((cpuc->txn_flags & PERF_PMU_TXN_READ) &&
> -	    !is_slots_event(event))
>  		return;
> 
> -	perf_pmu_disable(event->pmu);
> -	x86_pmu.update_topdown_event(event);
> -	perf_pmu_enable(event->pmu);
> -}
> -
> -static void intel_pmu_read_event(struct perf_event *event)
> -{
>  	if (event->hw.flags & PERF_X86_EVENT_AUTO_RELOAD)
>  		intel_pmu_auto_reload_read(event);
> -	else if (is_topdown_count(event) && x86_pmu.update_topdown_event)
> -		intel_pmu_read_topdown_event(event);
> -	else
> +	else if (is_slots_count(event) && x86_pmu.update_topdown_event) {
> +		perf_pmu_disable(event->pmu);
> +		x86_pmu.update_topdown_event(event);
> +		perf_pmu_enable(event->pmu);
> +	} else
>  		x86_perf_event_update(event);
>  }

I'm a little puzzled by this; what happens if you:

	fd = sys_perf_event_open(&attr_slots);
	fd1 = sys_perf_event_open(&attr_metric, .group_fd=fd);

	read(fd1);

?