From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71E8CC433E1 for ; Sat, 8 Aug 2020 23:51:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4D29F20672 for ; Sat, 8 Aug 2020 23:51:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1596930670; bh=drw5bpymsEmzse0AQE94EHwiijtRpGBgXRZNsFvsyBE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=HjaYT4dNJVfXLFegY4/Bn+8N33Y333SlnTgA2X3trzLFjkCbryxTj+I5a1luvoPeD PTREDq5iA3+w85TPVSZ2JyMB3AzsBf77sluZsLLxXbV40M4NLzjgm+20N4V3UJdmKx tMNsQ0J69YbLllf7OuoSjwaVNZAc1HVvygM5onOo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728421AbgHHXvJ (ORCPT ); Sat, 8 Aug 2020 19:51:09 -0400 Received: from mail.kernel.org ([198.145.29.99]:48524 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726648AbgHHXgK (ORCPT ); Sat, 8 Aug 2020 19:36:10 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9CD34206D8; Sat, 8 Aug 2020 23:36:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1596929769; bh=drw5bpymsEmzse0AQE94EHwiijtRpGBgXRZNsFvsyBE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NwbwsS0sSUkDcGgLRr8NMKwc22UybdwiKB0yp6/lhM5QUNEP+Va8Ao1WKVvNSBsjH 5b3jPdLunsVg/Tmbwemfea6SE2TJQlzKIHAbLARYXZG+xEFfxwJx+2qT1rxOfKqsBd h8n49WipAbqXKtT+wESGbFedON66mzgBmJ/7ii5g= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Marek Szyprowski , Lukasz Luba , Krzysztof Kozlowski , Sasha Levin , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH AUTOSEL 5.8 20/72] ARM: exynos: MCPM: Restore big.LITTLE cpuidle support Date: Sat, 8 Aug 2020 19:34:49 -0400 Message-Id: <20200808233542.3617339-20-sashal@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200808233542.3617339-1-sashal@kernel.org> References: <20200808233542.3617339-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marek Szyprowski [ Upstream commit ea9dd8f61c8a890843f68e8dc0062ce78365aab8 ] Call exynos_cpu_power_up(cpunr) unconditionally. This is needed by the big.LITTLE cpuidle driver and has no side-effects on other code paths. The additional soft-reset call during little core power up has been added to properly boot all cores on the Exynos5422-based boards with secure firmware (like Odroid XU3/XU4 family). This however broke big.LITTLE CPUidle driver, which worked only on boards without secure firmware (like Peach-Pit/Pi Chromebooks). Apply the workaround only when board is running under secure firmware. Fixes: 833b5794e330 ("ARM: EXYNOS: reset Little cores when cpu is up") Signed-off-by: Marek Szyprowski Reviewed-by: Lukasz Luba Signed-off-by: Krzysztof Kozlowski Signed-off-by: Sasha Levin --- arch/arm/mach-exynos/mcpm-exynos.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index 9a681b421ae11..cd861c57d5adf 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -26,6 +26,7 @@ #define EXYNOS5420_USE_L2_COMMON_UP_STATE BIT(30) static void __iomem *ns_sram_base_addr __ro_after_init; +static bool secure_firmware __ro_after_init; /* * The common v7_exit_coherency_flush API could not be used because of the @@ -58,15 +59,16 @@ static void __iomem *ns_sram_base_addr __ro_after_init; static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster) { unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER); + bool state; pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER || cluster >= EXYNOS5420_NR_CLUSTERS) return -EINVAL; - if (!exynos_cpu_power_state(cpunr)) { - exynos_cpu_power_up(cpunr); - + state = exynos_cpu_power_state(cpunr); + exynos_cpu_power_up(cpunr); + if (!state && secure_firmware) { /* * This assumes the cluster number of the big cores(Cortex A15) * is 0 and the Little cores(Cortex A7) is 1. @@ -258,6 +260,8 @@ static int __init exynos_mcpm_init(void) return -ENOMEM; } + secure_firmware = exynos_secure_firmware_available(); + /* * To increase the stability of KFC reset we need to program * the PMU SPARE3 register -- 2.25.1