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From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-mips@linux-mips.org
Cc: Florian Fainelli <f.fainelli@gmail.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Huacai Chen <chenhc@lemote.com>,
	Paul Burton <paulburton@kernel.org>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Mike Rapoport <rppt@kernel.org>,
	Liangliang Huang <huanglllzu@gmail.com>,
	Oleksij Rempel <linux@rempel-privat.de>,
	Kamal Dasu <kdasu.kdev@gmail.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM BMIPS
	MIPS ARCHITECTURE),
	linux-mips@vger.kernel.org (open list:BROADCOM BMIPS MIPS
	ARCHITECTURE), linux-kernel@vger.kernel.org (open list)
Subject: [PATCH mips-fixes 0/2] MIPS: BMIPS: couple of fixes
Date: Wed, 19 Aug 2020 11:26:43 -0700	[thread overview]
Message-ID: <20200819182645.30132-1-f.fainelli@gmail.com> (raw)

Hi Thomas,

These two patches are fixes for the BMIPS5000/5200 CPU cores which were
missing an inclusive physical cache setting from the cpuinfo structure
and we would not be calling CPU specific initialization for secondarey
cores on the second hardware thread.

Thanks!

Florian Fainelli (2):
  MIPS: mm: BMIPS5000 has inclusive physical caches
  MIPS: BMIPS: Also call bmips_cpu_setup() for secondary cores

 arch/mips/kernel/smp-bmips.c | 2 ++
 arch/mips/mm/c-r4k.c         | 4 ++++
 2 files changed, 6 insertions(+)

-- 
2.17.1


             reply	other threads:[~2020-08-19 18:26 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-19 18:26 Florian Fainelli [this message]
2020-08-19 18:26 ` [PATCH mips-fixes 1/2] MIPS: mm: BMIPS5000 has inclusive physical caches Florian Fainelli
2020-08-19 18:26 ` [PATCH mips-fixes 2/2] MIPS: BMIPS: Also call bmips_cpu_setup() for secondary cores Florian Fainelli
2020-08-21  7:47 ` [PATCH mips-fixes 0/2] MIPS: BMIPS: couple of fixes Thomas Bogendoerfer

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