From: Borislav Petkov <bp@alien8.de>
To: X86 ML <x86@kernel.org>
Cc: "Chang S . Bae" <chang.seok.bae@intel.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH] x86/entry/64: Add an LFENCE after SAVE_AND_SET_GSBASE
Date: Thu, 20 Aug 2020 11:15:44 +0200 [thread overview]
Message-ID: <20200820091544.26564-1-bp@alien8.de> (raw)
From: Borislav Petkov <bp@suse.de>
The FSGSBASE macro to swap current GSBASE with the kernel GSBASE
probably had a speculation-stopping MSR write at some point but not
anymore.
Therefore, a fence is needed to stop speculation. Add it.
Fixes: c82965f9e530 ("x86/entry/64: Handle FSGSBASE enabled paranoid entry/exit")
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: <stable@vger.kernel.org>
---
arch/x86/entry/entry_64.S | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 26fc9b42fadc..3931d47cdd83 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -839,11 +839,9 @@ SYM_CODE_START_LOCAL(paranoid_entry)
* Read the current GSBASE and store it in %rbx unconditionally,
* retrieve and set the current CPUs kernel GSBASE. The stored value
* has to be restored in paranoid_exit unconditionally.
- *
- * The MSR write ensures that no subsequent load is based on a
- * mispredicted GSBASE. No extra FENCE required.
*/
SAVE_AND_SET_GSBASE scratch_reg=%rax save_reg=%rbx
+ FENCE_SWAPGS_KERNEL_ENTRY
ret
.Lparanoid_entry_checkgs:
--
2.21.0
next reply other threads:[~2020-08-20 9:18 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-20 9:15 Borislav Petkov [this message]
2020-08-20 18:04 ` [PATCH] x86/entry/64: Add an LFENCE after SAVE_AND_SET_GSBASE Bae, Chang Seok
2020-08-21 9:07 ` [PATCH -v2] x86/entry/64: Correct the comment over SAVE_AND_SET_GSBASE Borislav Petkov
2020-08-24 8:40 ` [tip: x86/fsgsbase] " tip-bot2 for Borislav Petkov
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