[PATCH] arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml

[PATCH] arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml

[Michal Simek]

Rename amba-apu and amba to AXI. Based on Xilinx ZynqMP TRM (Chapter 15)
chip is "using the advanced eXtensible interface (AXI) point-to-point
channels for communicating addresses, data, and response transactions
between master and slave clients."

Issues are reported as:
...: amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
	From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml
...: amba-apu@0: $nodename:0: 'amba-apu@0' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
	From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

The only one problem with this patch is that it breaks paths in
/proc/device-tree/.
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 165a95a106c8..98073f3223e5 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -182,7 +182,7 @@ fpga_full: fpga-full {
 		ranges;
 	};
 
-	amba_apu: amba-apu@0 {
+	amba_apu: axi@0 {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <1>;
@@ -201,7 +201,7 @@ gic: interrupt-controller@f9010000 {
 		};
 	};
 
-	amba: amba {
+	amba: axi {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
-- 
2.28.0

Re: [PATCH] arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml

[Krzysztof Kozlowski]

On Mon, Aug 24, 2020 at 12:05:42PM +0200, Michal Simek wrote:
> Rename amba-apu and amba to AXI. Based on Xilinx ZynqMP TRM (Chapter 15)
> chip is "using the advanced eXtensible interface (AXI) point-to-point
> channels for communicating addresses, data, and response transactions
> between master and slave clients."
> 
> Issues are reported as:
> ...: amba: $nodename:0: 'amba' does not match
> '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
> 	From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml
> ...: amba-apu@0: $nodename:0: 'amba-apu@0' does not match
> '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
> 	From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml
> 
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
> 
> The only one problem with this patch is that it breaks paths in
> /proc/device-tree/.
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

Re: [PATCH] arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml

[Michal Simek]

po 24. 8. 2020 v 12:05 odesílatel Michal Simek <michal.simek@xilinx.com> napsal:
>
> Rename amba-apu and amba to AXI. Based on Xilinx ZynqMP TRM (Chapter 15)
> chip is "using the advanced eXtensible interface (AXI) point-to-point
> channels for communicating addresses, data, and response transactions
> between master and slave clients."
>
> Issues are reported as:
> ...: amba: $nodename:0: 'amba' does not match
> '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>         From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml
> ...: amba-apu@0: $nodename:0: 'amba-apu@0' does not match
> '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>         From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> The only one problem with this patch is that it breaks paths in
> /proc/device-tree/.
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 165a95a106c8..98073f3223e5 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -182,7 +182,7 @@ fpga_full: fpga-full {
>                 ranges;
>         };
>
> -       amba_apu: amba-apu@0 {
> +       amba_apu: axi@0 {
>                 compatible = "simple-bus";
>                 #address-cells = <2>;
>                 #size-cells = <1>;
> @@ -201,7 +201,7 @@ gic: interrupt-controller@f9010000 {
>                 };
>         };
>
> -       amba: amba {
> +       amba: axi {
>                 compatible = "simple-bus";
>                 #address-cells = <2>;
>                 #size-cells = <2>;
> --
> 2.28.0
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs