[PATCH v4 3/3] arm64: dts: sparx5: Add Sparx5 eMMC support

Lars Povlsen
2020-08-24T15:13:46Z

This adds eMMC support to the applicable Sparx5 board configuration
files.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 24 +++++++++++++++++++
.../boot/dts/microchip/sparx5_pcb125.dts | 23 ++++++++++++++++++
.../boot/dts/microchip/sparx5_pcb134_emmc.dts | 23 ++++++++++++++++++
.../boot/dts/microchip/sparx5_pcb135_emmc.dts | 23 ++++++++++++++++++
4 files changed, 93 insertions(+)

diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 84bca999420ef..c9dbd1a8b22b6 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
@@ -5,6 +5,7 @@

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/microchip,sparx5.h>

/ {
compatible = "microchip,sparx5";
@@ -162,6 +163,20 @@ timer1: timer@600105000 {
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
};

+ sdhci0: sdhci@600800000 {
+ compatible = "microchip,dw-sparx5-sdhci";
+ status = "disabled";
+ reg = <0x6 0x00800000 0x1000>;
+ pinctrl-0 = <&emmc_pins>;
+ pinctrl-names = "default";
+ clocks = <&clks CLK_ID_AUX1>;
+ clock-names = "core";
+ assigned-clocks = <&clks CLK_ID_AUX1>;
+ assigned-clock-rates = <800000000>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ bus-width = <8>;
+ };
+
gpio: pinctrl@6110101e0 {
compatible = "microchip,sparx5-pinctrl";
reg = <0x6 0x110101e0 0x90>, <0x6 0x10508010 0x100>;
@@ -191,6 +206,15 @@ i2c2_pins: i2c2-pins {
pins = "GPIO_28", "GPIO_29";
function = "twi2";
};
+
+ emmc_pins: emmc-pins {
+ pins = "GPIO_34", "GPIO_35", "GPIO_36",
+ "GPIO_37", "GPIO_38", "GPIO_39",
+ "GPIO_40", "GPIO_41", "GPIO_42",
+ "GPIO_43", "GPIO_44", "GPIO_45",
+ "GPIO_46", "GPIO_47";
+ function = "emmc";
+ };
};

i2c0: i2c@600101000 {
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
index 91ee5b6cfc37a..573309fe45823 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
@@ -16,6 +16,29 @@ memory@0 {
};
};

+&gpio {
+ emmc_pins: emmc-pins {
+ /* NB: No "GPIO_35", "GPIO_36", "GPIO_37"
+ * (N/A: CARD_nDETECT, CARD_WP, CARD_LED)
+ */
+ pins = "GPIO_34", "GPIO_38", "GPIO_39",
+ "GPIO_40", "GPIO_41", "GPIO_42",
+ "GPIO_43", "GPIO_44", "GPIO_45",
+ "GPIO_46", "GPIO_47";
+ drive-strength = <3>;
+ function = "emmc";
+ };
+};
+
+&sdhci0 {
+ status = "okay";
+ bus-width = <8>;
+ non-removable;
+ pinctrl-0 = <&emmc_pins>;
+ max-frequency = <8000000>;
+ microchip,clock-delay = <10>;
+};
+
&i2c1 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_emmc.dts b/arch/arm64/boot/dts/microchip/sparx5_pcb134_emmc.dts
index 10081a66961bb..bbb9852c1f151 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_emmc.dts
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_emmc.dts
@@ -15,3 +15,26 @@ memory@0 {
reg = <0x00000000 0x00000000 0x10000000>;
};
};
+
+&gpio {
+ emmc_pins: emmc-pins {
+ /* NB: No "GPIO_35", "GPIO_36", "GPIO_37"
+ * (N/A: CARD_nDETECT, CARD_WP, CARD_LED)
+ */
+ pins = "GPIO_34", "GPIO_38", "GPIO_39",
+ "GPIO_40", "GPIO_41", "GPIO_42",
+ "GPIO_43", "GPIO_44", "GPIO_45",
+ "GPIO_46", "GPIO_47";
+ drive-strength = <3>;
+ function = "emmc";
+ };
+};
+
+&sdhci0 {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>;
+ non-removable;
+ max-frequency = <52000000>;
+ bus-width = <8>;
+ microchip,clock-delay = <10>;
+};
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_emmc.dts b/arch/arm64/boot/dts/microchip/sparx5_pcb135_emmc.dts
index 741f0e12260e5..f82266fe2ad49 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_emmc.dts
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_emmc.dts
@@ -15,3 +15,26 @@ memory@0 {
reg = <0x00000000 0x00000000 0x10000000>;
};
};
+
+&gpio {
+ emmc_pins: emmc-pins {
+ /* NB: No "GPIO_35", "GPIO_36", "GPIO_37"
+ * (N/A: CARD_nDETECT, CARD_WP, CARD_LED)
+ */
+ pins = "GPIO_34", "GPIO_38", "GPIO_39",
+ "GPIO_40", "GPIO_41", "GPIO_42",
+ "GPIO_43", "GPIO_44", "GPIO_45",
+ "GPIO_46", "GPIO_47";
+ drive-strength = <3>;
+ function = "emmc";
+ };
+};
+
+&sdhci0 {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>;
+ non-removable;
+ max-frequency = <52000000>;
+ bus-width = <8>;
+ microchip,clock-delay = <10>;
+};
--
2.27.0