From: Sasha Levin <sashal@kernel.org>
To: Sasha Levin <sashal@kernel.org>
To: Kim Phillips <kim.phillips@amd.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michael Petlan <mpetlan@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: x86 <x86@kernel.org>
Cc: stable@vger.kernel.org
Cc: stable@vger.kernel.org
Subject: Re: [PATCH 1/7 RESEND] perf/amd/uncore: Set all slices and threads to restore perf stat -a behaviour
Date: Wed, 26 Aug 2020 13:53:58 +0000 [thread overview]
Message-ID: <20200826135358.C4D4C22B4B@mail.kernel.org> (raw)
In-Reply-To: <20200817220628.7604-1-kim.phillips@amd.com>
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 2f217d58a8a0 ("perf/x86/amd/uncore: Set the thread mask for F17h L3 PMCs").
The bot has tested the following trees: v5.8.2, v5.7.16, v5.4.59, v4.19.140, v4.14.193.
v5.8.2: Build OK!
v5.7.16: Build OK!
v5.4.59: Failed to apply! Possible dependencies:
4dcc3df82573 ("perf/amd/uncore: Prepare L3 thread mask code for Family 19h")
9689dbbeaea8 ("perf/amd/uncore: Make L3 thread mask code more readable")
e48667b86548 ("perf/amd/uncore: Add support for Family 19h L3 PMU")
v4.19.140: Failed to apply! Possible dependencies:
4dcc3df82573 ("perf/amd/uncore: Prepare L3 thread mask code for Family 19h")
6d0ef316b9f8 ("x86/events: Add Hygon Dhyana support to PMU infrastructure")
9689dbbeaea8 ("perf/amd/uncore: Make L3 thread mask code more readable")
e48667b86548 ("perf/amd/uncore: Add support for Family 19h L3 PMU")
v4.14.193: Failed to apply! Possible dependencies:
4dcc3df82573 ("perf/amd/uncore: Prepare L3 thread mask code for Family 19h")
6d0ef316b9f8 ("x86/events: Add Hygon Dhyana support to PMU infrastructure")
9689dbbeaea8 ("perf/amd/uncore: Make L3 thread mask code more readable")
e48667b86548 ("perf/amd/uncore: Add support for Family 19h L3 PMU")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
prev parent reply other threads:[~2020-08-26 13:55 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-17 22:06 [PATCH 1/7 RESEND] perf/amd/uncore: Set all slices and threads to restore perf stat -a behaviour Kim Phillips
2020-08-17 22:06 ` [PATCH 2/7] perf/x86/amd: Fix sampling Large Increment per Cycle events Kim Phillips
2020-08-17 22:06 ` [PATCH 3/7] arch/x86/amd/ibs: Fix re-arming IBS Fetch Kim Phillips
2020-08-17 22:06 ` [PATCH 4/7] perf/x86/amd/ibs: Don't include randomized bits in get_ibs_op_count() Kim Phillips
2020-08-17 22:06 ` [PATCH 5/7] perf/x86/amd/ibs: Fix raw sample data accumulation Kim Phillips
2020-08-17 22:06 ` [PATCH 6/7] perf/x86/amd/ibs: Support 27-bit extended Op/cycle counter Kim Phillips
2020-08-17 22:06 ` [PATCH 7/7] perf/x86/rapl: Add AMD Fam19h RAPL support Kim Phillips
2020-08-26 13:53 ` Sasha Levin [this message]
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