Re: [PATCH v2 3/3] riscv: Add cache information in AUX vector

[Dan Carpenter <dan.carpenter@oracle.com>]

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Hi Zong,

url:    https://github.com/0day-ci/linux/commits/Zong-Li/Get-cache-information-from-userland/20200827-162439
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 15bc20c6af4ceee97a1f90b43c0e386643c071b4
config: riscv-randconfig-m031-20200828 (attached as .config)
compiler: riscv64-linux-gcc (GCC) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>

smatch warnings:
arch/riscv/kernel/cacheinfo.c:55 get_cache_geometry() warn: variable dereferenced before check 'this_leaf' (see line 52)

# https://github.com/0day-ci/linux/commit/a51c248ba0626069792c3f84c8879f685f4a1ff6
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Zong-Li/Get-cache-information-from-userland/20200827-162439
git checkout a51c248ba0626069792c3f84c8879f685f4a1ff6
vim +/this_leaf +55 arch/riscv/kernel/cacheinfo.c

a51c248ba06260 Zong Li 2020-08-27  49  uintptr_t get_cache_geometry(u32 level, enum cache_type type)
a51c248ba06260 Zong Li 2020-08-27  50  {
a51c248ba06260 Zong Li 2020-08-27  51  	struct cacheinfo *this_leaf = get_cacheinfo(level, type);
a51c248ba06260 Zong Li 2020-08-27 @52  	uintptr_t ret = (this_leaf->ways_of_associativity << 16 |
a51c248ba06260 Zong Li 2020-08-27  53  			 this_leaf->coherency_line_size);
                                                         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Dereferenced

a51c248ba06260 Zong Li 2020-08-27  54  
a51c248ba06260 Zong Li 2020-08-27 @55  	return this_leaf ? ret : 0;
                                               ^^^^^^^^^
Checked too late.

a51c248ba06260 Zong Li 2020-08-27  56  }

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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