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From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	stable@vger.kernel.org, Jon Hunter <jonathanh@nvidia.com>,
	Sowjanya Komatineni <skomatineni@nvidia.com>,
	Ulf Hansson <ulf.hansson@linaro.org>
Subject: [PATCH 5.4 09/16] dt-bindings: mmc: tegra: Add tmclk for Tegra210 and later
Date: Fri,  4 Sep 2020 15:30:02 +0200	[thread overview]
Message-ID: <20200904120257.654794262@linuxfoundation.org> (raw)
In-Reply-To: <20200904120257.203708503@linuxfoundation.org>

From: Sowjanya Komatineni <skomatineni@nvidia.com>

commit f7f86e8ac0ad7cd6792a80137f5a550924966916 upstream.

commit b5a84ecf025a ("mmc: tegra: Add Tegra210 support")

Tegra210 and later uses separate SDMMC_LEGACY_TM clock for data
timeout.

So, this patch adds "tmclk" to Tegra sdhci clock property in the
device tree binding.

Fixes: b5a84ecf025a ("mmc: tegra: Add Tegra210 support")
Cc: stable <stable@vger.kernel.org> # 5.4
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1598548861-32373-4-git-send-email-skomatineni@nvidia.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt |   32 +++++++++-
 1 file changed, 29 insertions(+), 3 deletions(-)

--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -15,8 +15,15 @@ Required properties:
   - "nvidia,tegra210-sdhci": for Tegra210
   - "nvidia,tegra186-sdhci": for Tegra186
   - "nvidia,tegra194-sdhci": for Tegra194
-- clocks : Must contain one entry, for the module clock.
-  See ../clocks/clock-bindings.txt for details.
+- clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
+	  One for the module clock and one for the timeout clock.
+	  For all other Tegra devices, must contain a single entry for
+	  the module clock. See ../clocks/clock-bindings.txt for details.
+- clock-names: For Tegra210, Tegra186 and Tegra194 must contain the
+	       strings 'sdhci' and 'tmclk' to represent the module and
+	       the timeout clocks, respectively.
+	       For all other Tegra devices must contain the string 'sdhci'
+	       to represent the module clock.
 - resets : Must contain an entry for each entry in reset-names.
   See ../reset/reset.txt for details.
 - reset-names : Must include the following entries:
@@ -99,7 +106,7 @@ Optional properties for Tegra210, Tegra1
 
 Example:
 sdhci@700b0000 {
-	compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+	compatible = "nvidia,tegra124-sdhci";
 	reg = <0x0 0x700b0000 0x0 0x200>;
 	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 	clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
@@ -107,6 +114,25 @@ sdhci@700b0000 {
 	resets = <&tegra_car 14>;
 	reset-names = "sdhci";
 	pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+	pinctrl-0 = <&sdmmc1_3v3>;
+	pinctrl-1 = <&sdmmc1_1v8>;
+	nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
+	nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
+	nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
+	nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
+	status = "disabled";
+};
+
+sdhci@700b0000 {
+	compatible = "nvidia,tegra210-sdhci";
+	reg = <0x0 0x700b0000 0x0 0x200>;
+	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
+		 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
+	clock-names = "sdhci", "tmclk";
+	resets = <&tegra_car 14>;
+	reset-names = "sdhci";
+	pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
 	pinctrl-0 = <&sdmmc1_3v3>;
 	pinctrl-1 = <&sdmmc1_1v8>;
 	nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;



  parent reply	other threads:[~2020-09-04 13:55 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-04 13:29 [PATCH 5.4 00/16] 5.4.63-rc1 review Greg Kroah-Hartman
2020-09-04 13:29 ` [PATCH 5.4 01/16] HID: core: Correctly handle ReportSize being zero Greg Kroah-Hartman
2020-09-04 13:29 ` [PATCH 5.4 02/16] HID: core: Sanitize event code and type when mapping input Greg Kroah-Hartman
2020-09-04 13:29 ` [PATCH 5.4 03/16] perf record/stat: Explicitly call out event modifiers in the documentation Greg Kroah-Hartman
2020-09-04 13:29 ` [PATCH 5.4 04/16] drm/sched: Fix passing zero to PTR_ERR warning v2 Greg Kroah-Hartman
2020-09-04 13:29 ` [PATCH 5.4 05/16] drm/etnaviv: fix TS cache flushing on GPUs with BLT engine Greg Kroah-Hartman
2020-09-04 13:29 ` [PATCH 5.4 06/16] KVM: arm64: Add kvm_extable for vaxorcism code Greg Kroah-Hartman
2020-09-04 13:30 ` [PATCH 5.4 07/16] KVM: arm64: Survive synchronous exceptions caused by AT instructions Greg Kroah-Hartman
2020-09-04 13:30 ` [PATCH 5.4 08/16] KVM: arm64: Set HCR_EL2.PTW to prevent AT taking synchronous exception Greg Kroah-Hartman
2020-09-04 13:30 ` Greg Kroah-Hartman [this message]
2020-09-04 13:30 ` [PATCH 5.4 10/16] arm64: tegra: Add missing timeout clock to Tegra194 SDMMC nodes Greg Kroah-Hartman
2020-09-04 13:30 ` [PATCH 5.4 11/16] arm64: tegra: Add missing timeout clock to Tegra186 " Greg Kroah-Hartman
2020-09-04 13:30 ` [PATCH 5.4 12/16] arm64: tegra: Add missing timeout clock to Tegra210 SDMMC Greg Kroah-Hartman
2020-09-04 13:30 ` [PATCH 5.4 13/16] sdhci: tegra: Remove SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK for Tegra210 Greg Kroah-Hartman
2020-09-04 13:30 ` [PATCH 5.4 14/16] sdhci: tegra: Remove SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK for Tegra186 Greg Kroah-Hartman
2020-09-04 13:30 ` [PATCH 5.4 15/16] scsi: target: tcmu: Fix size in calls to tcmu_flush_dcache_range Greg Kroah-Hartman
2020-09-04 13:30 ` [PATCH 5.4 16/16] scsi: target: tcmu: Optimize use of flush_dcache_page Greg Kroah-Hartman
2020-09-04 19:23 ` [PATCH 5.4 00/16] 5.4.63-rc1 review Guenter Roeck
2020-09-04 20:07 ` Shuah Khan
2020-09-04 20:10 ` Shuah Khan
2020-09-05 15:34 ` Dan Rue
2020-09-06  7:37   ` Greg Kroah-Hartman

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