From: Martin Cerveny <m.cerveny@computer.org>
To: Maxime Ripard <mripard@kernel.org>
Cc: Martin Cerveny <m.cerveny@computer.org>,
Chen-Yu Tsai <wens@csie.org>, Daniel Vetter <daniel@ffwll.ch>,
David Airlie <airlied@linux.ie>,
dri-devel@lists.freedesktop.org,
Jernej Skrabec <jernej.skrabec@siol.net>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 1/2] drm/sun4i: sun8i-csc: Secondary CSC register correction
Date: Sun, 6 Sep 2020 18:21:39 +0200 [thread overview]
Message-ID: <20200906162140.5584-2-m.cerveny@computer.org> (raw)
In-Reply-To: <20200906162140.5584-1-m.cerveny@computer.org>
"Allwinner V3s" has secondary video layer (VI).
Decoded video is displayed in wrong colors until
secondary CSC registers are programmed correctly.
Signed-off-by: Martin Cerveny <m.cerveny@computer.org>
---
drivers/gpu/drm/sun4i/sun8i_csc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/sun8i_csc.h
index f42441b1b14d..a55a38ad849c 100644
--- a/drivers/gpu/drm/sun4i/sun8i_csc.h
+++ b/drivers/gpu/drm/sun4i/sun8i_csc.h
@@ -12,7 +12,7 @@ struct sun8i_mixer;
/* VI channel CSC units offsets */
#define CCSC00_OFFSET 0xAA050
-#define CCSC01_OFFSET 0xFA000
+#define CCSC01_OFFSET 0xFA050
#define CCSC10_OFFSET 0xA0000
#define CCSC11_OFFSET 0xF0000
--
2.17.1
next prev parent reply other threads:[~2020-09-06 16:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-06 16:21 [PATCH 0/2] drm/sun4i: sun8i-csc: Secondary CSC register correction Martin Cerveny
2020-09-06 16:21 ` Martin Cerveny [this message]
2020-09-08 16:13 ` [PATCH 1/2] " Jernej Škrabec
2020-09-06 16:21 ` [PATCH 2/2] drm/sun4i: mixer: Extend regmap max_register Martin Cerveny
2020-09-08 16:15 ` Jernej Škrabec
2020-09-10 11:09 ` [PATCH 0/2] drm/sun4i: sun8i-csc: Secondary CSC register correction Maxime Ripard
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