From: Lee Jones <lee.jones@linaro.org>
To: Xu Yilun <yilun.xu@intel.com>
Cc: broonie@kernel.org, linux-kernel@vger.kernel.org,
trix@redhat.com, matthew.gerlach@linux.intel.com,
russell.h.weight@intel.com, lgoncalv@redhat.com,
hao.wu@intel.com
Subject: Re: [PATCH v4 2/2] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC
Date: Tue, 8 Sep 2020 13:03:56 +0100 [thread overview]
Message-ID: <20200908120356.GQ4400@dell> (raw)
In-Reply-To: <20200829182405.GA27132@yilunxu-OptiPlex-7050>
> > > +static int check_m10bmc_version(struct intel_m10bmc *m10bmc)
> > > +{
> > > + unsigned int v;
> > > +
> > > + if (m10bmc_raw_read(m10bmc, M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER,
> > > + &v))
> > > + return -ENODEV;
> >
> > Please break functions out of if statements.
> >
> > Does m10bmc_raw_read() return 0 on success?
>
> Yes, this function just wrappered the regmap_read()
Avoid unnecessarily wrapping functions if possible.
> > Seems odd for a read function.
> >
> > > + if (v != 0xffffffff) {
> > > + dev_err(m10bmc->dev, "bad version M10BMC detected\n");
> > > + return -ENODEV;
> > > + }
> >
> > The only acceptable version is -1?
>
> As mentioned by Tom, this is a check if the board is using a very old legacy
> bmc version, the driver doesn't mean to support this old legacy bmc
> version.
Please add a descriptive comment and define the value.
> > > + * m10bmc_raw_read - read m10bmc register per addr
> > > + * m10bmc_sys_read - read m10bmc system register per offset
> > > + */
> > > +static inline int
> > > +m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr,
> > > + unsigned int *val)
> > > +{
> > > + int ret;
> > > +
> > > + ret = regmap_read(m10bmc->regmap, addr, val);
> > > + if (ret)
> > > + dev_err(m10bmc->dev, "fail to read raw reg %x: %d\n",
> > > + addr, ret);
> > > +
> > > + return ret;
> > > +}
> > > +
> > > +#define m10bmc_sys_read(m10bmc, offset, val) \
> > > + m10bmc_raw_read(m10bmc, M10BMC_SYS_BASE + (offset), val)
> >
> > No unnecessary abstractions.
> >
> > Just use the Regmap API directly please.
>
> Could we keep the 2 definition?
>
> For m10bmc_raw_read(), we make it to help print some error info if
> regmap RW fail. So we don't have to write "if (ret) dev_err" every time
> we use regmap.
How many call sites are there?
> For m10bmc_sys_read(), the offset of BMC system registers could be
> configured by HW developers (The MAX 10 is an CPLD, it could be easily
> reprogrammed). And the HW SPEC will not add the offset when describing
> the addresses of system registers. So:
> 1. It makes the definition of system registers in code align with HW SPEC.
> 2. It makes developers easier to make changes when the offset is adjusted
> in HW (I've been told by HW guys, it is sometimes necessary to adjust
> the offset when changing RTL, required by Altera EDA tool - Quartus).
Make sure you justify this for the function(s) you keep.
I'll take a closer look on the next submission.
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
next prev parent reply other threads:[~2020-09-08 19:40 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-19 7:34 [PATCH v4 0/2] add regmap-spi-avmm & Intel Max10 BMC chip support Xu Yilun
2020-08-19 7:34 ` [PATCH v4 1/2] regmap: add Intel SPI Slave to AVMM Bus Bridge support Xu Yilun
2020-08-19 7:34 ` [PATCH v4 2/2] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC Xu Yilun
2020-08-28 10:02 ` Lee Jones
2020-08-28 13:50 ` Tom Rix
2020-09-08 11:56 ` Lee Jones
2020-08-29 18:24 ` Xu Yilun
2020-09-08 12:03 ` Lee Jones [this message]
2020-09-09 6:01 ` Xu Yilun
2020-09-09 7:31 ` Lee Jones
2020-09-09 8:29 ` Xu Yilun
2020-08-26 19:16 ` [PATCH v4 0/2] add regmap-spi-avmm & Intel Max10 BMC chip support Mark Brown
2020-08-27 6:56 ` Lee Jones
2020-08-27 12:20 ` Mark Brown
2020-08-27 12:27 ` Lee Jones
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