diff for duplicates of <20200916124418.833-3-p.yadav@ti.com> diff --git a/a/1.txt b/N1/1.txt index 15188f5..fb59070 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1 +1,200 @@ -<<< No Message Collected >>> +They are thin wrappers around nor->controller_ops->{read,write}_reg(). +In a future commit DTR support will be added. These ops can not be +supported by the {read,write}_reg() hooks and these helpers will make it +easier to reject those calls. + +Signed-off-by: Pratyush Yadav <p.yadav@ti.com> +--- + drivers/mtd/spi-nor/core.c | 65 +++++++++++++++++++------------------- + 1 file changed, 32 insertions(+), 33 deletions(-) + +diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c +index 623384ef9a5d..cbfc4c2df79d 100644 +--- a/drivers/mtd/spi-nor/core.c ++++ b/drivers/mtd/spi-nor/core.c +@@ -82,6 +82,18 @@ static int spi_nor_spimem_exec_op(struct spi_nor *nor, struct spi_mem_op *op) + return spi_mem_exec_op(nor->spimem, op); + } + ++static int spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, ++ size_t len) ++{ ++ return nor->controller_ops->read_reg(nor, opcode, buf, len); ++} ++ ++static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf, ++ size_t len) ++{ ++ return nor->controller_ops->write_reg(nor, opcode, buf, len); ++} ++ + /** + * spi_nor_spimem_read_data() - read data from flash's memory region via + * spi-mem +@@ -229,8 +241,7 @@ int spi_nor_write_enable(struct spi_nor *nor) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREN, +- NULL, 0); ++ ret = spi_nor_write_reg(nor, SPINOR_OP_WREN, NULL, 0); + } + + if (ret) +@@ -258,8 +269,7 @@ int spi_nor_write_disable(struct spi_nor *nor) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRDI, +- NULL, 0); ++ ret = spi_nor_write_reg(nor, SPINOR_OP_WRDI, NULL, 0); + } + + if (ret) +@@ -289,8 +299,7 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR, +- sr, 1); ++ ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR, sr, 1); + } + + if (ret) +@@ -320,8 +329,7 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDFSR, +- fsr, 1); ++ ret = spi_nor_read_reg(nor, SPINOR_OP_RDFSR, fsr, 1); + } + + if (ret) +@@ -352,7 +360,7 @@ static int spi_nor_read_cr(struct spi_nor *nor, u8 *cr) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDCR, cr, 1); ++ ret = spi_nor_read_reg(nor, SPINOR_OP_RDCR, cr, 1); + } + + if (ret) +@@ -385,10 +393,10 @@ int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, +- enable ? SPINOR_OP_EN4B : +- SPINOR_OP_EX4B, +- NULL, 0); ++ ret = spi_nor_write_reg(nor, ++ enable ? SPINOR_OP_EN4B : ++ SPINOR_OP_EX4B, ++ NULL, 0); + } + + if (ret) +@@ -421,8 +429,7 @@ static int spansion_set_4byte_addr_mode(struct spi_nor *nor, bool enable) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR, +- nor->bouncebuf, 1); ++ ret = spi_nor_write_reg(nor, SPINOR_OP_BRWR, nor->bouncebuf, 1); + } + + if (ret) +@@ -453,8 +460,7 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREAR, +- nor->bouncebuf, 1); ++ ret = spi_nor_write_reg(nor, SPINOR_OP_WREAR, nor->bouncebuf, 1); + } + + if (ret) +@@ -484,8 +490,7 @@ int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_XRDSR, +- sr, 1); ++ ret = spi_nor_read_reg(nor, SPINOR_OP_XRDSR, sr, 1); + } + + if (ret) +@@ -529,8 +534,7 @@ static void spi_nor_clear_sr(struct spi_nor *nor) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLSR, +- NULL, 0); ++ ret = spi_nor_write_reg(nor, SPINOR_OP_CLSR, NULL, 0); + } + + if (ret) +@@ -593,8 +597,7 @@ static void spi_nor_clear_fsr(struct spi_nor *nor) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLFSR, +- NULL, 0); ++ ret = spi_nor_write_reg(nor, SPINOR_OP_CLFSR, NULL, 0); + } + + if (ret) +@@ -737,8 +740,7 @@ static int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR, +- sr, len); ++ ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR, sr, len); + } + + if (ret) { +@@ -939,8 +941,7 @@ static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR2, +- sr2, 1); ++ ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR2, sr2, 1); + } + + if (ret) { +@@ -973,8 +974,7 @@ static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR2, +- sr2, 1); ++ ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR2, sr2, 1); + } + + if (ret) +@@ -1004,8 +1004,7 @@ static int spi_nor_erase_chip(struct spi_nor *nor) + + ret = spi_mem_exec_op(nor->spimem, &op); + } else { +- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CHIP_ERASE, +- NULL, 0); ++ ret = spi_nor_write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0); + } + + if (ret) +@@ -1158,8 +1157,8 @@ static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr) + addr >>= 8; + } + +- return nor->controller_ops->write_reg(nor, nor->erase_opcode, +- nor->bouncebuf, nor->addr_width); ++ return spi_nor_write_reg(nor, nor->erase_opcode, nor->bouncebuf, ++ nor->addr_width); + } + + /** +-- +2.28.0 diff --git a/a/content_digest b/N1/content_digest index 29889ef..6254637 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -13,6 +13,205 @@ " Boris Brezillon <boris.brezillon@collabora.com>\0" "\00:1\0" "b\0" - <<< No Message Collected >>> + "They are thin wrappers around nor->controller_ops->{read,write}_reg().\n" + "In a future commit DTR support will be added. These ops can not be\n" + "supported by the {read,write}_reg() hooks and these helpers will make it\n" + "easier to reject those calls.\n" + "\n" + "Signed-off-by: Pratyush Yadav <p.yadav@ti.com>\n" + "---\n" + " drivers/mtd/spi-nor/core.c | 65 +++++++++++++++++++-------------------\n" + " 1 file changed, 32 insertions(+), 33 deletions(-)\n" + "\n" + "diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c\n" + "index 623384ef9a5d..cbfc4c2df79d 100644\n" + "--- a/drivers/mtd/spi-nor/core.c\n" + "+++ b/drivers/mtd/spi-nor/core.c\n" + "@@ -82,6 +82,18 @@ static int spi_nor_spimem_exec_op(struct spi_nor *nor, struct spi_mem_op *op)\n" + " \treturn spi_mem_exec_op(nor->spimem, op);\n" + " }\n" + " \n" + "+static int spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,\n" + "+\t\t\t size_t len)\n" + "+{\n" + "+\treturn nor->controller_ops->read_reg(nor, opcode, buf, len);\n" + "+}\n" + "+\n" + "+static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf,\n" + "+\t\t\t size_t len)\n" + "+{\n" + "+\treturn nor->controller_ops->write_reg(nor, opcode, buf, len);\n" + "+}\n" + "+\n" + " /**\n" + " * spi_nor_spimem_read_data() - read data from flash's memory region via\n" + " * spi-mem\n" + "@@ -229,8 +241,7 @@ int spi_nor_write_enable(struct spi_nor *nor)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREN,\n" + "-\t\t\t\t\t\t NULL, 0);\n" + "+\t\tret = spi_nor_write_reg(nor, SPINOR_OP_WREN, NULL, 0);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -258,8 +269,7 @@ int spi_nor_write_disable(struct spi_nor *nor)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRDI,\n" + "-\t\t\t\t\t\t NULL, 0);\n" + "+\t\tret = spi_nor_write_reg(nor, SPINOR_OP_WRDI, NULL, 0);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -289,8 +299,7 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR,\n" + "-\t\t\t\t\t\t sr, 1);\n" + "+\t\tret = spi_nor_read_reg(nor, SPINOR_OP_RDSR, sr, 1);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -320,8 +329,7 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDFSR,\n" + "-\t\t\t\t\t\t fsr, 1);\n" + "+\t\tret = spi_nor_read_reg(nor, SPINOR_OP_RDFSR, fsr, 1);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -352,7 +360,7 @@ static int spi_nor_read_cr(struct spi_nor *nor, u8 *cr)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDCR, cr, 1);\n" + "+\t\tret = spi_nor_read_reg(nor, SPINOR_OP_RDCR, cr, 1);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -385,10 +393,10 @@ int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor,\n" + "-\t\t\t\t\t\t enable ? SPINOR_OP_EN4B :\n" + "-\t\t\t\t\t\t\t SPINOR_OP_EX4B,\n" + "-\t\t\t\t\t\t NULL, 0);\n" + "+\t\tret = spi_nor_write_reg(nor,\n" + "+\t\t\t\t\tenable ? SPINOR_OP_EN4B :\n" + "+\t\t\t\t\t\t SPINOR_OP_EX4B,\n" + "+\t\t\t\t\tNULL, 0);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -421,8 +429,7 @@ static int spansion_set_4byte_addr_mode(struct spi_nor *nor, bool enable)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR,\n" + "-\t\t\t\t\t\t nor->bouncebuf, 1);\n" + "+\t\tret = spi_nor_write_reg(nor, SPINOR_OP_BRWR, nor->bouncebuf, 1);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -453,8 +460,7 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREAR,\n" + "-\t\t\t\t\t\t nor->bouncebuf, 1);\n" + "+\t\tret = spi_nor_write_reg(nor, SPINOR_OP_WREAR, nor->bouncebuf, 1);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -484,8 +490,7 @@ int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->read_reg(nor, SPINOR_OP_XRDSR,\n" + "-\t\t\t\t\t\t sr, 1);\n" + "+\t\tret = spi_nor_read_reg(nor, SPINOR_OP_XRDSR, sr, 1);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -529,8 +534,7 @@ static void spi_nor_clear_sr(struct spi_nor *nor)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLSR,\n" + "-\t\t\t\t\t\t NULL, 0);\n" + "+\t\tret = spi_nor_write_reg(nor, SPINOR_OP_CLSR, NULL, 0);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -593,8 +597,7 @@ static void spi_nor_clear_fsr(struct spi_nor *nor)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLFSR,\n" + "-\t\t\t\t\t\t NULL, 0);\n" + "+\t\tret = spi_nor_write_reg(nor, SPINOR_OP_CLFSR, NULL, 0);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -737,8 +740,7 @@ static int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR,\n" + "-\t\t\t\t\t\t sr, len);\n" + "+\t\tret = spi_nor_write_reg(nor, SPINOR_OP_WRSR, sr, len);\n" + " \t}\n" + " \n" + " \tif (ret) {\n" + "@@ -939,8 +941,7 @@ static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR2,\n" + "-\t\t\t\t\t\t sr2, 1);\n" + "+\t\tret = spi_nor_write_reg(nor, SPINOR_OP_WRSR2, sr2, 1);\n" + " \t}\n" + " \n" + " \tif (ret) {\n" + "@@ -973,8 +974,7 @@ static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR2,\n" + "-\t\t\t\t\t\t sr2, 1);\n" + "+\t\tret = spi_nor_read_reg(nor, SPINOR_OP_RDSR2, sr2, 1);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -1004,8 +1004,7 @@ static int spi_nor_erase_chip(struct spi_nor *nor)\n" + " \n" + " \t\tret = spi_mem_exec_op(nor->spimem, &op);\n" + " \t} else {\n" + "-\t\tret = nor->controller_ops->write_reg(nor, SPINOR_OP_CHIP_ERASE,\n" + "-\t\t\t\t\t\t NULL, 0);\n" + "+\t\tret = spi_nor_write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0);\n" + " \t}\n" + " \n" + " \tif (ret)\n" + "@@ -1158,8 +1157,8 @@ static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)\n" + " \t\taddr >>= 8;\n" + " \t}\n" + " \n" + "-\treturn nor->controller_ops->write_reg(nor, nor->erase_opcode,\n" + "-\t\t\t\t\t nor->bouncebuf, nor->addr_width);\n" + "+\treturn spi_nor_write_reg(nor, nor->erase_opcode, nor->bouncebuf,\n" + "+\t\t\t\t nor->addr_width);\n" + " }\n" + " \n" + " /**\n" + "-- \n" + 2.28.0 -8a220a0f5fd83520428194f4ea3be32fa8adb38cd8ee1667a52b5c43f6bbd513 +2dad8173d7540178ebdf4486d2e2bf40c7bfadbcd46075e17a7959ec6dd00c80
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