From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Sean V Kelley <sean.v.kelley@intel.com>
Cc: <bhelgaas@google.com>, <rafael.j.wysocki@intel.com>,
<ashok.raj@intel.com>, <tony.luck@intel.com>,
<sathyanarayanan.kuppuswamy@intel.com>, <qiuxu.zhuo@intel.com>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 07/10] PCI/RCEC: Add RCiEP's linked RCEC to AER/ERR
Date: Mon, 21 Sep 2020 12:31:56 +0100 [thread overview]
Message-ID: <20200921123156.00000f18@Huawei.com> (raw)
In-Reply-To: <20200918204603.62100-8-sean.v.kelley@intel.com>
On Fri, 18 Sep 2020 13:46:00 -0700
Sean V Kelley <sean.v.kelley@intel.com> wrote:
> From: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>
> When attempting error recovery for an RCiEP associated with an RCEC device,
> there needs to be a way to update the Root Error Status, the Uncorrectable
> Error Status and the Uncorrectable Error Severity of the parent RCEC.
> In some non-native cases in which there is no OS visible device
> associated with the RCiEP, there is nothing to act upon as the firmware
> is acting before the OS. So add handling for the linked 'rcec' in AER/ERR
> while taking into account non-native cases.
>
> Co-developed-by: Sean V Kelley <sean.v.kelley@intel.com>
> Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com>
> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
I'll give this a test run later to check I'm not missing anything, but LGTM.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Thanks,
> ---
> drivers/pci/pcie/aer.c | 9 +++++----
> drivers/pci/pcie/err.c | 38 ++++++++++++++++++++++++--------------
> 2 files changed, 29 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index 65dff5f3457a..dccdba60b5d9 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -1358,17 +1358,18 @@ static int aer_probe(struct pcie_device *dev)
> static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
> {
> int aer = dev->aer_cap;
> + int rc = 0;
> u32 reg32;
> - int rc;
> -
>
> /* Disable Root's interrupt in response to error messages */
> pci_read_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, ®32);
> reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
> pci_write_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, reg32);
>
> - rc = pci_bus_error_reset(dev);
> - pci_info(dev, "Root Port link has been reset\n");
> + if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC) {
> + rc = pci_bus_error_reset(dev);
> + pci_info(dev, "Root Port link has been reset\n");
> + }
>
> /* Clear Root Error Status */
> pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, ®32);
> diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c
> index 5380ecc41506..a61a2518163a 100644
> --- a/drivers/pci/pcie/err.c
> +++ b/drivers/pci/pcie/err.c
> @@ -149,7 +149,8 @@ static int report_resume(struct pci_dev *dev, void *data)
> /**
> * pci_bridge_walk - walk bridges potentially AER affected
> * @bridge bridge which may be an RCEC with associated RCiEPs,
> - * an RCiEP associated with an RCEC, or a Port.
> + * or a Port.
> + * @dev an RCiEP lacking an associated RCEC.
> * @cb callback to be called for each device found
> * @userdata arbitrary pointer to be passed to callback.
> *
> @@ -160,13 +161,16 @@ static int report_resume(struct pci_dev *dev, void *data)
> * If the device provided has no subordinate bus, call the provided
> * callback on the device itself.
> */
> -static void pci_bridge_walk(struct pci_dev *bridge, int (*cb)(struct pci_dev *, void *),
> +static void pci_bridge_walk(struct pci_dev *bridge, struct pci_dev *dev,
> + int (*cb)(struct pci_dev *, void *),
> void *userdata)
> {
> - if (bridge->subordinate)
> + if (bridge && bridge->subordinate)
> pci_walk_bus(bridge->subordinate, cb, userdata);
> - else
> + else if (bridge)
> cb(bridge, userdata);
> + else
> + cb(dev, userdata);
> }
>
> static pci_ers_result_t flr_on_rciep(struct pci_dev *dev)
> @@ -196,16 +200,24 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev,
> type = pci_pcie_type(dev);
> if (type == PCI_EXP_TYPE_ROOT_PORT ||
> type == PCI_EXP_TYPE_DOWNSTREAM ||
> - type == PCI_EXP_TYPE_RC_EC ||
> - type == PCI_EXP_TYPE_RC_END)
> + type == PCI_EXP_TYPE_RC_EC)
> bridge = dev;
> + else if (type == PCI_EXP_TYPE_RC_END)
> + bridge = dev->rcec;
> else
> bridge = pci_upstream_bridge(dev);
>
> pci_dbg(dev, "broadcast error_detected message\n");
> if (state == pci_channel_io_frozen) {
> - pci_bridge_walk(bridge, report_frozen_detected, &status);
> + pci_bridge_walk(bridge, dev, report_frozen_detected, &status);
> if (type == PCI_EXP_TYPE_RC_END) {
> + /*
> + * The callback only clears the Root Error Status
> + * of the RCEC (see aer.c).
> + */
> + if (bridge)
> + reset_subordinate_devices(bridge);
> +
> status = flr_on_rciep(dev);
> if (status != PCI_ERS_RESULT_RECOVERED) {
> pci_warn(dev, "function level reset failed\n");
> @@ -219,13 +231,13 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev,
> }
> }
> } else {
> - pci_bridge_walk(bridge, report_normal_detected, &status);
> + pci_bridge_walk(bridge, dev, report_normal_detected, &status);
> }
>
> if (status == PCI_ERS_RESULT_CAN_RECOVER) {
> status = PCI_ERS_RESULT_RECOVERED;
> pci_dbg(dev, "broadcast mmio_enabled message\n");
> - pci_bridge_walk(bridge, report_mmio_enabled, &status);
> + pci_bridge_walk(bridge, dev, report_mmio_enabled, &status);
> }
>
> if (status == PCI_ERS_RESULT_NEED_RESET) {
> @@ -236,18 +248,16 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev,
> */
> status = PCI_ERS_RESULT_RECOVERED;
> pci_dbg(dev, "broadcast slot_reset message\n");
> - pci_bridge_walk(bridge, report_slot_reset, &status);
> + pci_bridge_walk(bridge, dev, report_slot_reset, &status);
> }
>
> if (status != PCI_ERS_RESULT_RECOVERED)
> goto failed;
>
> pci_dbg(dev, "broadcast resume message\n");
> - pci_bridge_walk(bridge, report_resume, &status);
> + pci_bridge_walk(bridge, dev, report_resume, &status);
>
> - if (type == PCI_EXP_TYPE_ROOT_PORT ||
> - type == PCI_EXP_TYPE_DOWNSTREAM ||
> - type == PCI_EXP_TYPE_RC_EC) {
> + if (bridge) {
> if (pcie_aer_is_native(bridge))
> pcie_clear_device_status(bridge);
> pci_aer_clear_nonfatal_status(bridge);
next prev parent reply other threads:[~2020-09-21 11:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20200918204603.62100-1-sean.v.kelley@intel.com>
2020-09-18 20:45 ` [PATCH v5 03/10] PCI/RCEC: Cache RCEC capabilities in pci_init_capabilities() Sean V Kelley
2020-09-21 10:09 ` Jonathan Cameron
2020-09-22 20:45 ` Bjorn Helgaas
2020-09-22 21:54 ` Sean V Kelley
2020-09-18 20:45 ` [PATCH v5 05/10] PCI/AER: Apply function level reset to RCiEP on fatal error Sean V Kelley
2020-09-21 11:13 ` Jonathan Cameron
2020-09-23 2:49 ` Sean V Kelley
2020-09-18 20:45 ` [PATCH v5 06/10] PCI/RCEC: Add pcie_link_rcec() to associate RCiEPs Sean V Kelley
2020-09-21 11:25 ` Jonathan Cameron
2020-09-23 2:55 ` Sean V Kelley
2020-09-18 20:46 ` [PATCH v5 09/10] PCI/PME: Add pcie_walk_rcec() to RCEC PME handling Sean V Kelley
2020-09-21 12:15 ` Jonathan Cameron
[not found] ` <20200918204603.62100-8-sean.v.kelley@intel.com>
2020-09-21 11:31 ` Jonathan Cameron [this message]
2020-09-23 2:50 ` [PATCH v5 07/10] PCI/RCEC: Add RCiEP's linked RCEC to AER/ERR Sean V Kelley
[not found] ` <20200918204603.62100-9-sean.v.kelley@intel.com>
2020-09-21 12:12 ` [PATCH v5 08/10] PCI/AER: Add pcie_walk_rcec() to RCEC AER handling Jonathan Cameron
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