Re: [PATCH 4/5] dt-bindings: memory: tegra: Add missing swgroups

Nicolin Chen
2020-10-28T01:40:03Z

On Tue, Oct 27, 2020 at 01:55:06PM +0100, Thierry Reding wrote:

> This does indeed look correct, based on what registers exist for these.
> It'd be good to know how Nicolin expects these to be used, since these
> are currently not listed in device tree. There's certainly some like

Judging from our downstream code, I don't actually expect all of
them will be used, except some being used yet not got upstream.

> TSEC or NVDEC that we don't support (yet) upstream, but things like DC1
> and HC1 already have equivalents that we use, so I'm not sure how we'll
> integrate these new ones.

Downstream code groups those equivalents swgroups, so I think we
can do similarly using tegra_smmu_group_soc like the existing one
for display, if any of them gets upstream someday.