From: kan.liang@linux.intel.com
To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org
Cc: ak@linux.intel.com, Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH 3/4] perf/x86/msr: Add Rocket Lake CPU support
Date: Mon, 19 Oct 2020 08:35:27 -0700 [thread overview]
Message-ID: <20201019153528.13850-3-kan.liang@linux.intel.com> (raw)
In-Reply-To: <20201019153528.13850-1-kan.liang@linux.intel.com>
From: Kan Liang <kan.liang@linux.intel.com>
Like Ice Lake and Tiger Lake, PPERF and SMI_COUNT MSRs are also
supported by Rocket Lake.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
arch/x86/events/msr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 4be8f9cabd07..680404c58cb1 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -99,6 +99,7 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_ICELAKE_D:
case INTEL_FAM6_TIGERLAKE_L:
case INTEL_FAM6_TIGERLAKE:
+ case INTEL_FAM6_ROCKETLAKE:
if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
return true;
break;
--
2.25.1
next prev parent reply other threads:[~2020-10-19 15:36 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-19 15:35 [PATCH 1/4] perf/x86/intel: Add Rocket Lake CPU support kan.liang
2020-10-19 15:35 ` [PATCH 2/4] perf/x86/cstate: " kan.liang
2020-10-29 10:51 ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-10-19 15:35 ` kan.liang [this message]
2020-10-29 10:51 ` [tip: perf/core] perf/x86/msr: " tip-bot2 for Kan Liang
2020-10-19 15:35 ` [PATCH 4/4] perf/x86/intel/uncore: Add Rocket Lake support kan.liang
2020-10-29 10:51 ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-10-29 10:51 ` [tip: perf/core] perf/x86/intel: Add Rocket Lake CPU support tip-bot2 for Kan Liang
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