From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAFD7C55178 for ; Tue, 27 Oct 2020 15:13:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 91E802224A for ; Tue, 27 Oct 2020 15:13:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603811603; bh=lZE+UNIZcFc2Co4R7eO1u5OeQcue2NH2ygHCDCoJ9js=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=PNAGjhw5ilzwW6eKW9Aq4bj/DztppGsufLfy7UtzDZQFMuzoQesPTkdadm0aKOLKS XuaMmoI8uTB8FxgWljX4/28YHyXQmm+Z4not38j84rZ/tMql0boyKaRoI4Oz3D+qKn SlbqS23HUMCIa8do0dMiAzBK5RVB2r1a8EsMK1jw= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1794754AbgJ0PNW (ORCPT ); Tue, 27 Oct 2020 11:13:22 -0400 Received: from mail.kernel.org ([198.145.29.99]:36334 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1789426AbgJ0PCM (ORCPT ); Tue, 27 Oct 2020 11:02:12 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8D78620715; Tue, 27 Oct 2020 15:02:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603810931; bh=lZE+UNIZcFc2Co4R7eO1u5OeQcue2NH2ygHCDCoJ9js=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vt2b2KvE8/VgxLKHkVFMmQ2TnWulQvTdXyV+kTIFwqElvRq8+vsLoyEKwyzSvfWiJ 2IVWd648G6qS6v8J/ndxgQ8Oyu3H3WqD3KbD+sDdo4gFjfKtK2aTd4Zk6o/odOsnqJ FpkZnOjI85GsUBg7Zd8ZTdrOxx9KdYdeWwm92xQY= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Suzuki K Poulose , Sai Prakash Ranjan , Mathieu Poirier , Sasha Levin Subject: [PATCH 5.8 283/633] coresight: etm4x: Fix save and restore of TRCVMIDCCTLR1 register Date: Tue, 27 Oct 2020 14:50:26 +0100 Message-Id: <20201027135535.955208020@linuxfoundation.org> X-Mailer: git-send-email 2.29.1 In-Reply-To: <20201027135522.655719020@linuxfoundation.org> References: <20201027135522.655719020@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sai Prakash Ranjan [ Upstream commit 3477326277451000bc667dfcc4fd0774c039184c ] In commit f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states"), mistakenly TRCVMIDCCTLR1 register value was saved in trcvmidcctlr0 state variable which is used to store TRCVMIDCCTLR0 register value in etm4x_cpu_save() and then same value is written back to both TRCVMIDCCTLR0 and TRCVMIDCCTLR1 in etm4x_cpu_restore(). There is already a trcvmidcctlr1 state variable available for TRCVMIDCCTLR1, so use it. Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states") Reviewed-by: Suzuki K Poulose Signed-off-by: Sai Prakash Ranjan Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20200928163513.70169-26-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin --- drivers/hwtracing/coresight/coresight-etm4x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index d6395aeffd99d..d4e74b03c1e0f 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -1233,7 +1233,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) state->trccidcctlr1 = readl(drvdata->base + TRCCIDCCTLR1); state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR0); - state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR1); + state->trcvmidcctlr1 = readl(drvdata->base + TRCVMIDCCTLR1); state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR); @@ -1343,7 +1343,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) writel_relaxed(state->trccidcctlr1, drvdata->base + TRCCIDCCTLR1); writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR0); - writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR1); + writel_relaxed(state->trcvmidcctlr1, drvdata->base + TRCVMIDCCTLR1); writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET); -- 2.25.1