[PATCH v2 5/7] media: camss: csiphy-3ph: Add support for SDM630/660

kholk11
2020-10-22T17:47:28Z

The CSIPHY on SDM630/660 needs a slightly longer T_HS_CLK_MISS
configuration on lanes CFG4.

Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
---
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
index 2e65caf1ecae..97cb9de85031 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
@@ -8,6 +8,7 @@
* Copyright (C) 2016-2018 Linaro Ltd.
*/

+#include "camss.h"
#include "camss-csiphy.h"

#include <linux/delay.h>
@@ -21,6 +22,7 @@
#define CSIPHY_3PH_LNn_CFG3(n) (0x008 + 0x100 * (n))
#define CSIPHY_3PH_LNn_CFG4(n) (0x00c + 0x100 * (n))
#define CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS 0xa4
+#define CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS_660 0xa5
#define CSIPHY_3PH_LNn_CFG5(n) (0x010 + 0x100 * (n))
#define CSIPHY_3PH_LNn_CFG5_T_HS_DTERM 0x02
#define CSIPHY_3PH_LNn_CFG5_HS_REC_EQ_FQ_INT 0x50
@@ -198,7 +200,10 @@ static void csiphy_lanes_enable(struct csiphy_device *csiphy,
val = CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG;
writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l));

- val = CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS;
+ if (csiphy->camss->version == CAMSS_660)
+ val = CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS_660;
+ else
+ val = CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS;
writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG4(l));

val = CSIPHY_3PH_LNn_MISC1_IS_CLKLANE;
--
2.28.0