drivers/i2c/busses/i2c-mlxbf.c:513:21: sparse: sparse: cast to restricted __be32

kernel test robot
2020-11-02T04:25:37Z

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tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 3cea11cd5e3b00d91caf0b4730194039b45c5891
commit: b5b5b32081cd206baa6e58cca7f112d9723785d6 i2c: mlxbf: I2C SMBus driver for Mellanox BlueField SoC
date: 5 weeks ago
config: arm64-randconfig-s031-20201102 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-68-g49c98aa3-dirty
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=b5b5b32081cd206baa6e58cca7f112d9723785d6
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout b5b5b32081cd206baa6e58cca7f112d9723785d6
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

"sparse warnings: (new ones prefixed by >>)"
>> drivers/i2c/busses/i2c-mlxbf.c:513:21: sparse: sparse: cast to restricted __be32
>> drivers/i2c/busses/i2c-mlxbf.c:513:21: sparse: sparse: cast to restricted __be32
>> drivers/i2c/busses/i2c-mlxbf.c:513:21: sparse: sparse: cast to restricted __be32
>> drivers/i2c/busses/i2c-mlxbf.c:513:21: sparse: sparse: cast to restricted __be32
>> drivers/i2c/busses/i2c-mlxbf.c:513:21: sparse: sparse: cast to restricted __be32
>> drivers/i2c/busses/i2c-mlxbf.c:513:21: sparse: sparse: cast to restricted __be32
>> drivers/i2c/busses/i2c-mlxbf.c:527:35: sparse: sparse: cast from restricted __be32

vim +513 drivers/i2c/busses/i2c-mlxbf.c

501
502 /*
503 * This function is used to read data from Master GW Data Descriptor.
504 * Data bytes in the Master GW Data Descriptor are shifted left so the
505 * data starts at the MSB of the descriptor registers as set by the
506 * underlying hardware. TYU_READ_DATA enables byte swapping while
507 * reading data bytes, and MUST be called by the SMBus read routines
508 * to copy data from the 32 * 32-bit HW Data registers a.k.a Master GW
509 * Data Descriptor.
510 */
511 static u32 mlxbf_i2c_read_data(void __iomem *io, int reg)
512 {
> 513 return (u32)be32_to_cpu(mlxbf_i2c_read(io, reg));
514 }
515
516 /*
517 * This function is used to write data to the Master GW Data Descriptor.
518 * Data copied to the Master GW Data Descriptor MUST be shifted left so
519 * the data starts at the MSB of the descriptor registers as required by
520 * the underlying hardware. TYU_WRITE_DATA enables byte swapping when
521 * writing data bytes, and MUST be called by the SMBus write routines to
522 * copy data to the 32 * 32-bit HW Data registers a.k.a Master GW Data
523 * Descriptor.
524 */
525 static void mlxbf_i2c_write_data(void __iomem *io, int reg, u32 val)
526 {
> 527 mlxbf_i2c_write(io, reg, (u32)cpu_to_be32(val));
528 }
529

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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