From: Christoph Hellwig <hch@lst.de>
To: Jongpil Jung <jongpuls@gmail.com>
Cc: Keith Busch <kbusch@kernel.org>, Jens Axboe <axboe@fb.com>,
Christoph Hellwig <hch@lst.de>, Sagi Grimberg <sagi@grimberg.me>,
linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org,
gloria.tsai@ssstc.com, jongpil19.jung@samsung.com,
jongheony.kim@samsung.com, dj54.sohn@samsung.com
Subject: Re: [PATCH V3 1/1] nvme: Add quirk for LiteON CL1 devices running FW 220TQ,22001
Date: Mon, 2 Nov 2020 19:13:27 +0100 [thread overview]
Message-ID: <20201102181327.GD20182@lst.de> (raw)
In-Reply-To: <20201029145529.GA19011@lst.de>
On Thu, Oct 29, 2020 at 03:55:29PM +0100, Christoph Hellwig wrote:
> I'm still worried about this.
>
> If power state based suspend does always work despite a HMB and is
> preferred for the specific Google board we should have purely a DMI
> based quirk for the board independent of the NVMe controller used with
> it.
>
> But if these LiteON devices can't properly handle nvme_dev_disable
> calls we have much deeper problems, because it can be called in all
> kinds of places, including suspending when not on this specific board.
>
> That being said, I still really do not understand this sentence and thus
> the problem at all:
>
> > When NVMe device receive D3hot from host, NVMe firmware will do
> > garbage collection. While NVMe device do Garbage collection,
> > firmware has chance to going incorrect address.
Any progress in describing the problem a little better?
next prev parent reply other threads:[~2020-11-02 18:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 9:14 [PATCH V3 1/1] nvme: Add quirk for LiteON CL1 devices running FW 220TQ,22001 Jongpil Jung
2020-10-28 17:17 ` Christoph Hellwig
2020-10-29 2:20 ` Gloria Tsai
2020-10-29 2:33 ` Keith Busch
2020-10-29 3:15 ` Keith Busch
2020-10-29 3:21 ` Gloria Tsai
2020-10-29 14:55 ` Christoph Hellwig
2020-11-02 18:13 ` Christoph Hellwig [this message]
2020-11-03 2:21 ` Gloria Tsai
2020-11-03 9:23 ` Christoph Hellwig
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