From: Siddhant Gupta <siddhantgupta416@gmail.com>
To: matthias.bgg@gmail.com
Cc: gregkh@linuxfoundation.org, devel@driverdev.osuosl.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
mamtashukla555@gmail.com, himadrispandya@gmail.com
Subject: [PATCH] Staging: mt7621-pci: Fix alignment warnings
Date: Fri, 6 Nov 2020 15:00:21 +0530 [thread overview]
Message-ID: <20201106093021.GA25237@Sleakybeast> (raw)
Fix the alignment issue pointed out by checkpatch
Signed-off-by: Siddhant Gupta <siddhantgupta416@gmail.com>
---
drivers/staging/mt7621-pci/pci-mt7621.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index f961b353c22e..0e95fb33b4e9 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -278,8 +278,8 @@ static void setup_cm_memory_region(struct mt7621_pcie *pcie)
write_gcr_reg1_base(mem_resource->start);
write_gcr_reg1_mask(mask | CM_GCR_REGn_MASK_CMTGT_IOCU0);
dev_info(dev, "PCI coherence region base: 0x%08llx, mask/settings: 0x%08llx\n",
- (unsigned long long)read_gcr_reg1_base(),
- (unsigned long long)read_gcr_reg1_mask());
+ (unsigned long long)read_gcr_reg1_base(),
+ (unsigned long long)read_gcr_reg1_mask());
}
}
--
2.25.1
reply other threads:[~2020-11-06 9:30 UTC|newest]
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