From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78626C388F7 for ; Tue, 10 Nov 2020 14:49:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 259FA2076E for ; Tue, 10 Nov 2020 14:49:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="xV9tTqTd" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731038AbgKJOtS (ORCPT ); Tue, 10 Nov 2020 09:49:18 -0500 Received: from esa5.microchip.iphmx.com ([216.71.150.166]:14620 "EHLO esa5.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730465AbgKJOtR (ORCPT ); Tue, 10 Nov 2020 09:49:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1605019757; x=1636555757; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=YIfq/cYeNogRWEgZu7eOtkVGhAYuISTT7suK3mro9yU=; b=xV9tTqTdnkJkoO5TP0Gwv9oJpTNx8cRHvWMqNuXqFEHvZvVtk1XhEQeV npzORbdTz2BYevG8bspF0CJQgd4nPThoR7PYiDQeSNSXGyuHqB6vFAVqv k4M3cdsZ0OqUTUZDrpex3yjNgq3zeuRNcEzgKVPBwKjDZSJY7SCkBWmY9 SWrLU6LwWCKjae2fAVpUaEjs8xH1HyfeNgq4bXnLt+z15IddZhn/sPz9U VmNiX4k4RRyNMdZ+WVsuiO1v45MMceycmQEhiLB6kxoLE9AnBb1nvJzYK PCjtLHxUz3rmEPH1uHCTx1qBvsbRVNifaam+J4dtoQIZsInmCsaxLTHjO g==; IronPort-SDR: QrgFmve+dJ706GFrv3ZxQ1vvG7o+prXXED0MWfxB+yHczQNWJVKrwKwQT9GdoNqP0yF/zi/V40 WIJkbgwaT8PLCQHKCGnz0d1YEvhswKGJohY6gfCUc3PFs8EXjO4+lOBNkuDqUvCWWV9ohu13HR yke4iQy3p8nYzr2HQFcsomUBcKIv4jMC9EwSDrb8HatcBUgcnjbLCBBvodSnobL7T58tu9cT7h 0kBeMeZJDuULWt9t9UIHsljGNT1ykN7t0/9eaw0UlD+Qa4QvUXJ/0jtQ2d1+4zW14+ys5myRGw HZM= X-IronPort-AV: E=Sophos;i="5.77,466,1596524400"; d="scan'208";a="97866627" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Nov 2020 07:49:17 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Tue, 10 Nov 2020 07:49:16 -0700 Received: from mchp-dev-shegelun.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Tue, 10 Nov 2020 07:49:14 -0700 From: Steen Hegelund To: Kishon Vijay Abraham I , Vinod Koul CC: Steen Hegelund , Alexandre Belloni , Lars Povlsen , Bjarni Jonasson , Microsemi List , Microchip UNG Driver List , Subject: [PATCH v2 0/4] Adding the Sparx5 Serdes driver Date: Tue, 10 Nov 2020 15:49:06 +0100 Message-ID: <20201110144910.558164-1-steen.hegelund@microchip.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Adding the Sparx5 Serdes driver This series of patches provides the serdes driver for the Microchip Sparx5 ethernet switch. The serdes driver supports the 10G and 25G serdes instances available in the Sparx5. The Sparx5 serdes support several interface modes with several speeds and also allows the client to change the mode and the speed according to changing in the environment such as changing cables from DAC to fiber. The serdes driver is to be used by the Sparx5 switchdev driver that will follow in subsequent series. History: -------- v1 -> v2: Fixed kernel test robot warnings - Made these structures static: - media_presets_25g - mode_presets_25g - media_presets_10g - mode_presets_10g - Removed these duplicate initializations: - sparx5_sd25g28_params.cfg_rx_reserve_15_8 - sparx5_sd25g28_params.cfg_pi_en - sparx5_sd25g28_params.cfg_cdrck_en - sparx5_sd10g28_params.cfg_cdrck_en Lars Povlsen (2): dt-bindings: phy: Add sparx5-serdes bindings arm64: dts: sparx5: Add Sparx5 serdes driver node Steen Hegelund (2): phy: Add ethernet serdes configuration option phy: Add Sparx5 ethernet serdes PHY driver .../bindings/phy/microchip,sparx5-serdes.yaml | 283 ++ arch/arm64/boot/dts/microchip/sparx5.dtsi | 195 ++ drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/microchip/Kconfig | 12 + drivers/phy/microchip/Makefile | 6 + drivers/phy/microchip/sparx5_serdes.c | 2464 +++++++++++++++ drivers/phy/microchip/sparx5_serdes_regs.h | 2773 +++++++++++++++++ include/linux/phy/phy-ethernet-serdes.h | 49 + include/linux/phy/phy.h | 4 + 10 files changed, 5788 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml create mode 100644 drivers/phy/microchip/Kconfig create mode 100644 drivers/phy/microchip/Makefile create mode 100644 drivers/phy/microchip/sparx5_serdes.c create mode 100644 drivers/phy/microchip/sparx5_serdes_regs.h create mode 100644 include/linux/phy/phy-ethernet-serdes.h base-commit: 3cea11cd5e3b00d91caf0b4730194039b45c5891 prerequisite-patch-id: b155844f6a5e402ba62a39b1a2b276c8378eeb49 prerequisite-patch-id: 1605ab05e4212d0bba88a858c6dd16df64194282 prerequisite-patch-id: 8d9741ec8a716b179e39d640b3aab8f934c2573d -- 2.29.2