From: Vinod Koul <vkoul@kernel.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Swapnil Kashinath Jakhade <sjakhade@cadence.com>,
Milind Parab <mparab@cadence.com>,
Yuti Suresh Amonkar <yamonkar@cadence.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 3/9] phy: ti: j721e-wiz: Don't configure wiz if its already configured
Date: Mon, 16 Nov 2020 13:00:29 +0530 [thread overview]
Message-ID: <20201116073029.GI7499@vkoul-mobl> (raw)
In-Reply-To: <20201103035556.21260-4-kishon@ti.com>
On 03-11-20, 09:25, Kishon Vijay Abraham I wrote:
> From: Faiz Abbas <faiz_abbas@ti.com>
>
> Serdes lanes might be shared between multiple cores in some usecases
> and its not possible to lock PLLs for both the lanes independently
> by the two cores. This requires a bootloader to configure both the
> lanes at early boot time.
>
> To handle this case, skip all configuration if any of the lanes has
> already been enabled.
>
> While we are here, also fix the wiz_init() to be called before the
> of_platform_device_create() call.
Let's do two patches for these two issues :-)
Other than that, change lgtm, with exception of minor nit
> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> drivers/phy/ti/phy-j721e-wiz.c | 36 +++++++++++++++++++++-------------
> 1 file changed, 22 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
> index d57d29382ce4..9786e8aec252 100644
> --- a/drivers/phy/ti/phy-j721e-wiz.c
> +++ b/drivers/phy/ti/phy-j721e-wiz.c
> @@ -816,13 +816,14 @@ static int wiz_probe(struct platform_device *pdev)
> struct device *dev = &pdev->dev;
> struct device_node *node = dev->of_node;
> struct platform_device *serdes_pdev;
> + bool already_configured = false;
> struct device_node *child_node;
> struct regmap *regmap;
> struct resource res;
> void __iomem *base;
> struct wiz *wiz;
> u32 num_lanes;
> - int ret;
> + int ret, val, i;
>
> wiz = devm_kzalloc(dev, sizeof(*wiz), GFP_KERNEL);
> if (!wiz)
> @@ -944,10 +945,26 @@ static int wiz_probe(struct platform_device *pdev)
> goto err_get_sync;
> }
>
> - ret = wiz_clock_init(wiz, node);
> - if (ret < 0) {
> - dev_warn(dev, "Failed to initialize clocks\n");
> - goto err_get_sync;
> + for (i = 0; i < wiz->num_lanes; i++) {
> + regmap_field_read(wiz->p_enable[i], &val);
> + if (val & (P_ENABLE | P_ENABLE_FORCE)) {
> + already_configured = true;
> + break;
> + }
> + }
> +
> + if (!already_configured) {
do you really need this variable and check, why not move the below into
precceding block and do wiz_clock_init() and wiz_init() inside the
if condition and drop the variable
> + ret = wiz_clock_init(wiz, node);
> + if (ret < 0) {
> + dev_warn(dev, "Failed to initialize clocks\n");
> + goto err_get_sync;
> + }
> +
> + ret = wiz_init(wiz);
> + if (ret) {
> + dev_err(dev, "WIZ initialization failed\n");
> + goto err_pdev_create;
> + }
> }
>
> serdes_pdev = of_platform_device_create(child_node, NULL, dev);
> @@ -958,18 +975,9 @@ static int wiz_probe(struct platform_device *pdev)
> }
> wiz->serdes_pdev = serdes_pdev;
>
> - ret = wiz_init(wiz);
> - if (ret) {
> - dev_err(dev, "WIZ initialization failed\n");
> - goto err_wiz_init;
> - }
> -
> of_node_put(child_node);
> return 0;
>
> -err_wiz_init:
> - of_platform_device_destroy(&serdes_pdev->dev, NULL);
> -
> err_pdev_create:
> wiz_clock_cleanup(wiz, node);
>
> --
> 2.17.1
--
~Vinod
next prev parent reply other threads:[~2020-11-16 7:32 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-03 3:55 [PATCH 0/9] PHY: Enhance Sierra SERDES Kishon Vijay Abraham I
2020-11-03 3:55 ` [PATCH 1/9] dt-bindings: phy: cadence-sierra: Add bindings for the PLLs within SERDES Kishon Vijay Abraham I
2020-11-05 18:03 ` Rob Herring
2020-12-21 3:10 ` Kishon Vijay Abraham I
2020-11-03 3:55 ` [PATCH 2/9] phy: ti: j721e-wiz: Get PHY properties only for "phy" subnode Kishon Vijay Abraham I
2020-11-03 3:55 ` [PATCH 3/9] phy: ti: j721e-wiz: Don't configure wiz if its already configured Kishon Vijay Abraham I
2020-11-16 7:30 ` Vinod Koul [this message]
2021-03-09 12:13 ` Kishon Vijay Abraham I
2020-11-03 3:55 ` [PATCH 4/9] phy: cadence: cadence-sierra: Create PHY only for "phy" sub-nodes Kishon Vijay Abraham I
2020-11-03 3:55 ` [PATCH 5/9] phy: cadence: Sierra: Fix PHY power_on sequence Kishon Vijay Abraham I
2020-11-16 7:32 ` Vinod Koul
2020-11-03 3:55 ` [PATCH 6/9] phy: cadence: sierra: Don't configure if any plls are already locked Kishon Vijay Abraham I
2020-11-09 8:39 ` Philipp Zabel
2020-11-03 3:55 ` [PATCH 7/9] phy: cadence: sierra: Model reference receiver as clocks (gate clocks) Kishon Vijay Abraham I
2020-11-03 3:55 ` [PATCH 8/9] phy: cadence: sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks) Kishon Vijay Abraham I
2020-11-03 3:55 ` [PATCH 9/9] phy: cadence: sierra: Enable pll_cmnlc and pll_cmnlc1 clocks Kishon Vijay Abraham I
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