From: David Brazdil <dbrazdil@google.com>
To: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Dennis Zhou <dennis@kernel.org>,
Tejun Heo <tj@kernel.org>, Christoph Lameter <cl@linux.com>,
Mark Rutland <mark.rutland@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Quentin Perret <qperret@google.com>,
Andrew Scull <ascull@google.com>,
Andrew Walbran <qwandor@google.com>,
kernel-team@android.com, David Brazdil <dbrazdil@google.com>
Subject: [PATCH v2 19/24] kvm: arm64: Intercept host's PSCI_CPU_ON SMCs
Date: Mon, 16 Nov 2020 20:43:13 +0000 [thread overview]
Message-ID: <20201116204318.63987-20-dbrazdil@google.com> (raw)
In-Reply-To: <20201116204318.63987-1-dbrazdil@google.com>
Add a handler of the CPU_ON PSCI call from host. When invoked, it looks
up the logical CPU ID corresponding to the provided MPIDR and populates
the state struct of the target CPU with the provided x0, pc. It then
calls CPU_ON itself, with an entry point in hyp that initializes EL2
state before returning ERET to the provided PC in EL1.
There is a simple atomic lock around the reset state struct. If it is
already locked, CPU_ON will return PENDING_ON error code.
Signed-off-by: David Brazdil <dbrazdil@google.com>
---
arch/arm64/include/asm/kvm_asm.h | 8 ++-
arch/arm64/kvm/arm.c | 1 +
arch/arm64/kvm/hyp/nvhe/psci-relay.c | 104 +++++++++++++++++++++++++++
3 files changed, 110 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
index 109867fb76f6..2e36ba4be748 100644
--- a/arch/arm64/include/asm/kvm_asm.h
+++ b/arch/arm64/include/asm/kvm_asm.h
@@ -175,9 +175,11 @@ struct kvm_s2_mmu;
DECLARE_KVM_NVHE_SYM(__kvm_hyp_init);
DECLARE_KVM_NVHE_SYM(__kvm_hyp_host_vector);
DECLARE_KVM_HYP_SYM(__kvm_hyp_vector);
-#define __kvm_hyp_init CHOOSE_NVHE_SYM(__kvm_hyp_init)
-#define __kvm_hyp_host_vector CHOOSE_NVHE_SYM(__kvm_hyp_host_vector)
-#define __kvm_hyp_vector CHOOSE_HYP_SYM(__kvm_hyp_vector)
+DECLARE_KVM_NVHE_SYM(__kvm_hyp_psci_cpu_entry);
+#define __kvm_hyp_init CHOOSE_NVHE_SYM(__kvm_hyp_init)
+#define __kvm_hyp_host_vector CHOOSE_NVHE_SYM(__kvm_hyp_host_vector)
+#define __kvm_hyp_vector CHOOSE_HYP_SYM(__kvm_hyp_vector)
+#define __kvm_hyp_psci_cpu_entry CHOOSE_NVHE_SYM(__kvm_hyp_psci_cpu_entry)
extern unsigned long kvm_arm_hyp_percpu_base[NR_CPUS];
DECLARE_KVM_NVHE_SYM(__per_cpu_start);
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 7d2270eeecfb..c76a8e5bd19c 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -1365,6 +1365,7 @@ static void cpu_init_hyp_mode(void)
params->vector_hyp_va = (unsigned long)kern_hyp_va(kvm_ksym_ref(__kvm_hyp_host_vector));
params->stack_hyp_va = kern_hyp_va(__this_cpu_read(kvm_arm_hyp_stack_page) + PAGE_SIZE);
+ params->entry_hyp_va = (unsigned long)kern_hyp_va(kvm_ksym_ref(__kvm_hyp_psci_cpu_entry));
params->pgd_pa = kvm_mmu_get_httbr();
/*
diff --git a/arch/arm64/kvm/hyp/nvhe/psci-relay.c b/arch/arm64/kvm/hyp/nvhe/psci-relay.c
index 7542de8bd679..2daf52b59846 100644
--- a/arch/arm64/kvm/hyp/nvhe/psci-relay.c
+++ b/arch/arm64/kvm/hyp/nvhe/psci-relay.c
@@ -9,10 +9,15 @@
#include <asm/kvm_mmu.h>
#include <kvm/arm_hypercalls.h>
#include <linux/arm-smccc.h>
+#include <linux/kvm_host.h>
#include <linux/psci.h>
#include <kvm/arm_psci.h>
#include <uapi/linux/psci.h>
+#define INVALID_CPU_ID UINT_MAX
+
+extern char __kvm_hyp_cpu_entry[];
+
/* Config options set by the host. */
u32 __ro_after_init kvm_host_psci_version = PSCI_VERSION(0, 0);
u32 __ro_after_init kvm_host_psci_function_id[PSCI_FN_MAX];
@@ -20,6 +25,14 @@ s64 __ro_after_init hyp_physvirt_offset;
#define __hyp_pa(x) ((phys_addr_t)((x)) + hyp_physvirt_offset)
+struct kvm_host_psci_state {
+ atomic_t pending_on;
+ unsigned long pc;
+ unsigned long r0;
+};
+
+static DEFINE_PER_CPU(struct kvm_host_psci_state, kvm_host_psci_state);
+
static u64 get_psci_func_id(struct kvm_cpu_context *host_ctxt)
{
return host_ctxt->regs.regs[0];
@@ -76,10 +89,99 @@ static __noreturn unsigned long psci_forward_noreturn(struct kvm_cpu_context *ho
hyp_panic(); /* unreachable */
}
+static unsigned int find_cpu_id(u64 mpidr)
+{
+ int i;
+
+ if (mpidr != INVALID_HWID) {
+ for (i = 0; i < NR_CPUS; i++) {
+ if (cpu_logical_map(i) == mpidr)
+ return i;
+ }
+ }
+
+ return INVALID_CPU_ID;
+}
+
+static bool try_acquire_reset_state(struct kvm_host_psci_state *cpu_state,
+ unsigned long pc, unsigned long r0)
+{
+ if (atomic_cmpxchg_acquire(&cpu_state->pending_on, 0, 1) != 0)
+ return false;
+
+ cpu_state->pc = pc;
+ cpu_state->r0 = r0;
+ wmb();
+
+ return true;
+}
+
+static void release_reset_state(struct kvm_host_psci_state *cpu_state)
+{
+ atomic_set_release(&cpu_state->pending_on, 0);
+}
+
+static int psci_cpu_on(u64 func_id, struct kvm_cpu_context *host_ctxt)
+{
+ u64 mpidr = host_ctxt->regs.regs[1];
+ unsigned long pc = host_ctxt->regs.regs[2];
+ unsigned long r0 = host_ctxt->regs.regs[3];
+ unsigned int cpu_id;
+ struct kvm_host_psci_state *cpu_state;
+ struct kvm_nvhe_init_params *cpu_params;
+ int ret;
+
+ /*
+ * Find the logical CPU ID for the given MPIDR. The search set is
+ * the set of CPUs that were online at the point of KVM initialization.
+ * Booting other CPUs is rejected because their cpufeatures were not
+ * checked against the finalized capabilities. This could be relaxed
+ * by doing the feature checks in hyp.
+ */
+ cpu_id = find_cpu_id(mpidr);
+ if (cpu_id == INVALID_CPU_ID)
+ return PSCI_RET_INVALID_PARAMS;
+
+ cpu_state = per_cpu_ptr(&kvm_host_psci_state, cpu_id);
+ cpu_params = per_cpu_ptr(&kvm_init_params, cpu_id);
+
+ if (!try_acquire_reset_state(cpu_state, pc, r0))
+ return PSCI_RET_ALREADY_ON;
+
+ ret = psci_call(func_id, mpidr,
+ __hyp_pa(hyp_symbol_addr(__kvm_hyp_cpu_entry)),
+ __hyp_pa(cpu_params));
+
+ /*
+ * If CPU_ON was successful, the reset state will be released in
+ * kvm_host_psci_cpu_entry().
+ */
+ if (ret != PSCI_RET_SUCCESS)
+ release_reset_state(cpu_state);
+ return ret;
+}
+
+void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt);
+
+asmlinkage void __noreturn __kvm_hyp_psci_cpu_entry(void)
+{
+ struct kvm_host_psci_state *cpu_state = this_cpu_ptr(&kvm_host_psci_state);
+ struct kvm_cpu_context *host_ctxt = &this_cpu_ptr(&kvm_host_data)->host_ctxt;
+
+ host_ctxt->regs.regs[0] = cpu_state->r0;
+ write_sysreg_el2(cpu_state->pc, SYS_ELR);
+
+ release_reset_state(cpu_state);
+
+ __host_enter(host_ctxt);
+}
+
static unsigned long psci_0_1_handler(u64 func_id, struct kvm_cpu_context *host_ctxt)
{
if (func_id == kvm_host_psci_function_id[PSCI_FN_CPU_OFF])
return psci_forward(host_ctxt);
+ else if (func_id == kvm_host_psci_function_id[PSCI_FN_CPU_ON])
+ return psci_cpu_on(func_id, host_ctxt);
else if (func_id == kvm_host_psci_function_id[PSCI_FN_MIGRATE])
return psci_forward(host_ctxt);
else
@@ -100,6 +202,8 @@ static unsigned long psci_0_2_handler(u64 func_id, struct kvm_cpu_context *host_
case PSCI_0_2_FN_SYSTEM_RESET:
psci_forward_noreturn(host_ctxt);
unreachable();
+ case PSCI_0_2_FN64_CPU_ON:
+ return psci_cpu_on(func_id, host_ctxt);
default:
return PSCI_RET_NOT_SUPPORTED;
}
--
2.29.2.299.gdc1121823c-goog
next prev parent reply other threads:[~2020-11-16 20:44 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 20:42 [PATCH v2 00/24] Opt-in always-on nVHE hypervisor David Brazdil
2020-11-16 20:42 ` [PATCH v2 01/24] psci: Support psci_ops.get_version for v0.1 David Brazdil
2020-11-16 20:42 ` [PATCH v2 02/24] psci: Accessor for configured PSCI function IDs David Brazdil
2020-11-23 13:47 ` Marc Zyngier
2020-11-16 20:42 ` [PATCH v2 03/24] arm64: Make cpu_logical_map() take unsigned int David Brazdil
2020-11-16 20:42 ` [PATCH v2 04/24] arm64: Move MAIR_EL1_SET to asm/memory.h David Brazdil
2020-11-23 13:52 ` Marc Zyngier
2020-11-25 10:31 ` David Brazdil
2020-11-25 11:21 ` Marc Zyngier
2020-11-25 13:26 ` David Brazdil
2020-11-25 13:33 ` Marc Zyngier
2020-11-16 20:42 ` [PATCH v2 05/24] kvm: arm64: Initialize MAIR_EL2 using a constant David Brazdil
2020-11-16 20:43 ` [PATCH v2 06/24] kvm: arm64: Move hyp-init params to a per-CPU struct David Brazdil
2020-11-23 14:20 ` Marc Zyngier
2020-11-25 10:39 ` David Brazdil
2020-11-25 10:49 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 07/24] kvm: arm64: Refactor handle_trap to use a switch David Brazdil
2020-11-23 14:32 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 08/24] kvm: arm64: Add SMC handler in nVHE EL2 David Brazdil
2020-11-23 18:00 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 09/24] kvm: arm64: Add .hyp.data..ro_after_init ELF section David Brazdil
2020-11-16 20:43 ` [PATCH v2 10/24] kvm: arm64: Support per_cpu_ptr in nVHE hyp code David Brazdil
2020-11-16 20:43 ` [PATCH v2 11/24] kvm: arm64: Create nVHE copy of cpu_logical_map David Brazdil
2020-11-16 20:43 ` [PATCH v2 12/24] kvm: arm64: Bootstrap PSCI SMC handler in nVHE EL2 David Brazdil
2020-11-23 17:55 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 13/24] kvm: arm64: Add offset for hyp VA <-> PA conversion David Brazdil
2020-11-16 20:43 ` [PATCH v2 14/24] kvm: arm64: Forward safe PSCI SMCs coming from host David Brazdil
2020-11-16 20:43 ` [PATCH v2 15/24] kvm: arm64: Extract parts of el2_setup into a macro David Brazdil
2020-11-23 15:27 ` Marc Zyngier
2020-11-25 12:57 ` David Brazdil
2020-11-16 20:43 ` [PATCH v2 16/24] kvm: arm64: Extract __do_hyp_init into a helper function David Brazdil
2020-11-16 20:43 ` [PATCH v2 17/24] kvm: arm64: Add CPU entry point in nVHE hyp David Brazdil
2020-11-16 20:43 ` [PATCH v2 18/24] kvm: arm64: Add function to enter host from KVM nVHE hyp code David Brazdil
2020-11-16 20:43 ` David Brazdil [this message]
2020-11-23 17:04 ` [PATCH v2 19/24] kvm: arm64: Intercept host's PSCI_CPU_ON SMCs Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 20/24] kvm: arm64: Intercept host's CPU_SUSPEND PSCI SMCs David Brazdil
2020-11-23 17:22 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 21/24] kvm: arm64: Add kvm-arm.protected early kernel parameter David Brazdil
2020-11-23 17:30 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 22/24] kvm: arm64: Keep nVHE EL2 vector installed David Brazdil
2020-11-16 20:43 ` [PATCH v2 23/24] kvm: arm64: Trap host SMCs in protected mode David Brazdil
2020-11-23 17:36 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 24/24] kvm: arm64: Fix EL2 mode availability checks David Brazdil
2020-11-23 13:44 ` [PATCH v2 00/24] Opt-in always-on nVHE hypervisor Marc Zyngier
2020-11-23 18:01 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201116204318.63987-20-dbrazdil@google.com \
--to=dbrazdil@google.com \
--cc=ascull@google.com \
--cc=catalin.marinas@arm.com \
--cc=cl@linux.com \
--cc=dennis@kernel.org \
--cc=james.morse@arm.com \
--cc=julien.thierry.kdev@gmail.com \
--cc=kernel-team@android.com \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=qperret@google.com \
--cc=qwandor@google.com \
--cc=suzuki.poulose@arm.com \
--cc=tj@kernel.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox