From: David Brazdil <dbrazdil@google.com>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Dennis Zhou <dennis@kernel.org>,
Tejun Heo <tj@kernel.org>, Christoph Lameter <cl@linux.com>,
Mark Rutland <mark.rutland@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Quentin Perret <qperret@google.com>,
Andrew Scull <ascull@google.com>,
Andrew Walbran <qwandor@google.com>,
kernel-team@android.com
Subject: Re: [PATCH v2 04/24] arm64: Move MAIR_EL1_SET to asm/memory.h
Date: Wed, 25 Nov 2020 13:26:17 +0000 [thread overview]
Message-ID: <20201125132617.qf6vd752dtfasyi7@google.com> (raw)
In-Reply-To: <e6c9184c6ee986d134625932b4fa8e89@kernel.org>
> > > > +/*
> > > > + * Memory types available.
> > > > + *
> > > > + * IMPORTANT: MT_NORMAL must be index 0 since vm_get_page_prot() may 'or' in
> > > > + * the MT_NORMAL_TAGGED memory type for PROT_MTE mappings. Note
> > > > + * that protection_map[] only contains MT_NORMAL attributes.
> > > > + */
> > > > +#define MT_NORMAL 0
> > > > +#define MT_NORMAL_TAGGED 1
> > > > +#define MT_NORMAL_NC 2
> > > > +#define MT_NORMAL_WT 3
> > > > +#define MT_DEVICE_nGnRnE 4
> > > > +#define MT_DEVICE_nGnRE 5
> > > > +#define MT_DEVICE_GRE 6
> > > > +
> > > > +/*
> > > > + * Default MAIR_ELx. MT_NORMAL_TAGGED is initially mapped as Normal memory and
> > > > + * changed during __cpu_setup to Normal Tagged if the system supports MTE.
> > > > + */
> > > > +#define MAIR_ELx_SET \
> > > > + (MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRnE, MT_DEVICE_nGnRnE) | \
> > > > + MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) | \
> > > > + MAIR_ATTRIDX(MAIR_ATTR_DEVICE_GRE, MT_DEVICE_GRE) | \
> > > > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) | \
> > > > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \
> > > > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT) | \
> > > > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL_TAGGED))
> > > > +
>
> Wait: You now have MAIR_ELx_SET defined at two locations. Surely that's
> one too many.
>
Oops, told you I tried different things...
> > > > /* id_aa64isar0 */
> > > > #define ID_AA64ISAR0_RNDR_SHIFT 60
> > > > #define ID_AA64ISAR0_TLB_SHIFT 56
> > > > @@ -992,6 +1020,7 @@
> > > > /* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */
> > > > #define SYS_MPIDR_SAFE_VAL (BIT(31))
> > > >
> > > > +#ifndef LINKER_SCRIPT
> > >
> > > This is terribly ugly. Why is this included by the linker script? Does
> > > it actually define __ASSEMBLY__?
> >
> > vmlinux.lds.S includes memory.h for PAGE_SIZE. And yes, linker scripts
> > are
> > built with this rule:
> >
> > cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \
> > -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
> >
> > I tried a few things and wasn't completely happy with any of them. I
> > think in
> > the previous spin you suggested moving this constant to sysreg.h. That
> > works
> > too but sysreg.h seems to have only architecture constants, memory.h
> > about a
> > Linux-specific configuration, so I wanted to keep it here.
>
> MAIR_ELx_SET isn't really Linux specific. Or rather, not more specific than
> any of the other configurations we have. On the other hand, the S1 MT_*
> stuff
> is totally arbitrary, and does fit in memory.h, together with the rest of
> the indexes for the memory types.
>
> I came up with the following patch on top of this series that seems to
> compile without issue.
That seems to have an implicit dependency of sysreg.h on memory.h, doesn't it?
I had it the other way round initially. I also tried including memory.h in
sysreg.h. That creates a circular dependency mmdebug.h -> bug.h -> ... ->
sysreg.h -> memory.h -> mmdebug.h. Pretty annoying. I could try to fix that,
or create a new header file... :(
next prev parent reply other threads:[~2020-11-25 13:26 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 20:42 [PATCH v2 00/24] Opt-in always-on nVHE hypervisor David Brazdil
2020-11-16 20:42 ` [PATCH v2 01/24] psci: Support psci_ops.get_version for v0.1 David Brazdil
2020-11-16 20:42 ` [PATCH v2 02/24] psci: Accessor for configured PSCI function IDs David Brazdil
2020-11-23 13:47 ` Marc Zyngier
2020-11-16 20:42 ` [PATCH v2 03/24] arm64: Make cpu_logical_map() take unsigned int David Brazdil
2020-11-16 20:42 ` [PATCH v2 04/24] arm64: Move MAIR_EL1_SET to asm/memory.h David Brazdil
2020-11-23 13:52 ` Marc Zyngier
2020-11-25 10:31 ` David Brazdil
2020-11-25 11:21 ` Marc Zyngier
2020-11-25 13:26 ` David Brazdil [this message]
2020-11-25 13:33 ` Marc Zyngier
2020-11-16 20:42 ` [PATCH v2 05/24] kvm: arm64: Initialize MAIR_EL2 using a constant David Brazdil
2020-11-16 20:43 ` [PATCH v2 06/24] kvm: arm64: Move hyp-init params to a per-CPU struct David Brazdil
2020-11-23 14:20 ` Marc Zyngier
2020-11-25 10:39 ` David Brazdil
2020-11-25 10:49 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 07/24] kvm: arm64: Refactor handle_trap to use a switch David Brazdil
2020-11-23 14:32 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 08/24] kvm: arm64: Add SMC handler in nVHE EL2 David Brazdil
2020-11-23 18:00 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 09/24] kvm: arm64: Add .hyp.data..ro_after_init ELF section David Brazdil
2020-11-16 20:43 ` [PATCH v2 10/24] kvm: arm64: Support per_cpu_ptr in nVHE hyp code David Brazdil
2020-11-16 20:43 ` [PATCH v2 11/24] kvm: arm64: Create nVHE copy of cpu_logical_map David Brazdil
2020-11-16 20:43 ` [PATCH v2 12/24] kvm: arm64: Bootstrap PSCI SMC handler in nVHE EL2 David Brazdil
2020-11-23 17:55 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 13/24] kvm: arm64: Add offset for hyp VA <-> PA conversion David Brazdil
2020-11-16 20:43 ` [PATCH v2 14/24] kvm: arm64: Forward safe PSCI SMCs coming from host David Brazdil
2020-11-16 20:43 ` [PATCH v2 15/24] kvm: arm64: Extract parts of el2_setup into a macro David Brazdil
2020-11-23 15:27 ` Marc Zyngier
2020-11-25 12:57 ` David Brazdil
2020-11-16 20:43 ` [PATCH v2 16/24] kvm: arm64: Extract __do_hyp_init into a helper function David Brazdil
2020-11-16 20:43 ` [PATCH v2 17/24] kvm: arm64: Add CPU entry point in nVHE hyp David Brazdil
2020-11-16 20:43 ` [PATCH v2 18/24] kvm: arm64: Add function to enter host from KVM nVHE hyp code David Brazdil
2020-11-16 20:43 ` [PATCH v2 19/24] kvm: arm64: Intercept host's PSCI_CPU_ON SMCs David Brazdil
2020-11-23 17:04 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 20/24] kvm: arm64: Intercept host's CPU_SUSPEND PSCI SMCs David Brazdil
2020-11-23 17:22 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 21/24] kvm: arm64: Add kvm-arm.protected early kernel parameter David Brazdil
2020-11-23 17:30 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 22/24] kvm: arm64: Keep nVHE EL2 vector installed David Brazdil
2020-11-16 20:43 ` [PATCH v2 23/24] kvm: arm64: Trap host SMCs in protected mode David Brazdil
2020-11-23 17:36 ` Marc Zyngier
2020-11-16 20:43 ` [PATCH v2 24/24] kvm: arm64: Fix EL2 mode availability checks David Brazdil
2020-11-23 13:44 ` [PATCH v2 00/24] Opt-in always-on nVHE hypervisor Marc Zyngier
2020-11-23 18:01 ` Marc Zyngier
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