From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92A77C71155 for ; Mon, 30 Nov 2020 22:27:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 43D5F2073C for ; Mon, 30 Nov 2020 22:27:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730664AbgK3W1e (ORCPT ); Mon, 30 Nov 2020 17:27:34 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:58550 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730636AbgK3W1c (ORCPT ); Mon, 30 Nov 2020 17:27:32 -0500 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kjrd7-009afh-Fo; Mon, 30 Nov 2020 23:26:45 +0100 Date: Mon, 30 Nov 2020 23:26:45 +0100 From: Andrew Lunn To: Florian Fainelli Cc: Adrien Grassein , fugang.duan@nxp.com, davem@davemloft.net, kuba@kernel.org, robh+dt@kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/3] dt-bindings: net: fsl-fec add mdc/mdio bitbang option Message-ID: <20201130222645.GG2073444@lunn.ch> References: <20201128225425.19300-1-adrien.grassein@gmail.com> <20201129220000.16550-1-adrien.grassein@gmail.com> <20201129224113.GS2234159@lunn.ch> <20201129230416.GT2234159@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > >> I am currently upstreaming the "Nitrogen 8m Mini board" that seems to not use a > >> "normal" mdio bus but a "bitbanged" one with the fsl fec driver. > > > > Any idea why? > > > > Anyway, you should not replicate code, don't copy bitbanging code into > > the FEC. Just use the existing bit-banger MDIO bus master driver. > > Right there should be no need for you to modify the FEC driver at all, > there is an existing generic bitbanged MDIO bus driver here: Hi Florian Speculation on my part, until i hear back on the Why? question, but i'm guessing the board has a wrong pullup on the MDIO line. It takes too long for the PHY/FEC to pull the line low at the default 2.5MHz. bit-banging is much slower, so it works. If i'm right, there is a much simpler fix for this. Use the clock-frequency property for the MDIO bus to slow the clock down. Andrew