From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D81AC64E8A for ; Thu, 3 Dec 2020 09:50:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BAB2521D91 for ; Thu, 3 Dec 2020 09:50:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730199AbgLCJt7 (ORCPT ); Thu, 3 Dec 2020 04:49:59 -0500 Received: from mx2.suse.de ([195.135.220.15]:53356 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728958AbgLCJt7 (ORCPT ); Thu, 3 Dec 2020 04:49:59 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 69351AC55; Thu, 3 Dec 2020 09:49:17 +0000 (UTC) Date: Thu, 3 Dec 2020 09:49:14 +0000 From: Mel Gorman To: Peter Zijlstra Cc: Valentin Schneider , Barry Song , catalin.marinas@arm.com, will@kernel.org, rjw@rjwysocki.net, lenb@kernel.org, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, mingo@redhat.com, juri.lelli@redhat.com, vincent.guittot@linaro.org, dietmar.eggemann@arm.com, rostedt@goodmis.org, bsegall@google.com, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linuxarm@huawei.com, xuwei5@huawei.com, prime.zeng@hisilicon.com Subject: Re: [RFC PATCH v2 2/2] scheduler: add scheduler level for clusters Message-ID: <20201203094914.GE3306@suse.de> References: <20201201025944.18260-1-song.bao.hua@hisilicon.com> <20201201025944.18260-3-song.bao.hua@hisilicon.com> <20201203092831.GH2414@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <20201203092831.GH2414@hirez.programming.kicks-ass.net> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Dec 03, 2020 at 10:28:31AM +0100, Peter Zijlstra wrote: > On Tue, Dec 01, 2020 at 04:04:04PM +0000, Valentin Schneider wrote: > > > > Gating this behind this new config only leveraged by arm64 doesn't make it > > very generic. Note that powerpc also has this newish "CACHE" level which > > seems to overlap in function with your "CLUSTER" one (both are arch > > specific, though). > > > > I think what you are after here is an SD_SHARE_PKG_RESOURCES domain walk, > > i.e. scan CPUs by increasing cache "distance". We already have it in some > > form, as we scan SMT & LLC domains; AFAICT LLC always maps to MC, except > > for said powerpc's CACHE thingie. > > There's some intel chips with a smaller L2, but I don't think we ever > bothered. > > There's also the extended topology stuff from Intel: SMT, Core, Module, > Tile, Die, of which we've only partially used Die I think. > > Whatever we do, it might make sense to not all use different names. > > Also, I think Mel said he was cooking something for > select_idle_balance(). > > Also, I've previously posted patches that fold all the iterations into > one, so it might make sense to revisit some of that if Mel also already > didn.t I didn't. The NUMA/lb reconcilation took most of my attention and right now I'm looking at select_idle_sibling again in preparation for tracking the idle cpumask in a sensible fashion. The main idea I had in mind was special casing EPYC as it has multiple small L3 caches that may benefit from select_idle_sibling looking slightly beyond the LLC as a search domain but it has not even started yet. -- Mel Gorman SUSE Labs