Re: [PATCH 1/2] dt-bindings: pinctrl: qcom: Add SM8350 pinctrl bindings

[Vinod Koul <vkoul@kernel.org>]

On 03-12-20, 17:49, Bjorn Andersson wrote:

> > +#PIN CONFIGURATION NODES
> > +patternProperties:
> > +  '-pins$':
> > +    type: object
> > +    description:
> > +      Pinctrl node's client devices use subnodes for desired pin configuration.
> > +      Client device subnodes use below standard properties.
> > +    $ref: "/schemas/pinctrl/pincfg-node.yaml"
> > +
> > +    properties:
> > +      pins:
> > +        description:
> > +          List of gpio pins affected by the properties specified in this subnode.
> > +        items:
> > +          oneOf:
> > +            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
> 
> That doesn't cover the entire pin space, I think should be:
> 
> 	"^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"

I thought I had fixed this up, will update

> > +examples:
> > +  - |
> > +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +        tlmm: pinctrl@f000000 {
> > +          compatible = "qcom,sm8350-pinctrl";
> > +          reg = <0x0f100000 0x300000>;
> > +          interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> > +          gpio-controller;
> > +          #gpio-cells = <2>;
> > +          interrupt-controller;
> > +          #interrupt-cells = <2>;
> > +          gpio-ranges = <&tlmm 0 0 203>;
> > +          serial-pins {
> > +            pins = "gpio18", "gpio19";
> > +            function = "qup3";
> > +            drive-strength = <8>;
> > +            bias-disable;
> > +            };
> 
> Indentation is slightly off here.

Oops, thanks for pointing out

-- 
~Vinod