From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org
Cc: joro@8bytes.org, will@kernel.org,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH v4 04/13] iommu/amd: Convert to using amd_io_pgtable
Date: Tue, 15 Dec 2020 01:36:56 -0600 [thread overview]
Message-ID: <20201215073705.123786-5-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <20201215073705.123786-1-suravee.suthikulpanit@amd.com>
Make use of the new struct amd_io_pgtable in preparation to remove
the struct domain_pgtable.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/iommu.c | 25 ++++++++++---------------
2 files changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index b8dae3941f0f..bf9723b35e77 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -56,6 +56,7 @@ extern void amd_iommu_domain_direct_map(struct iommu_domain *dom);
extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids);
extern int amd_iommu_flush_page(struct iommu_domain *dom, u32 pasid,
u64 address);
+extern void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);
extern int amd_iommu_flush_tlb(struct iommu_domain *dom, u32 pasid);
extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, u32 pasid,
unsigned long cr3);
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 5b93536d6877..fdb6030b505d 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -89,8 +89,6 @@ struct kmem_cache *amd_iommu_irq_cache;
static void update_domain(struct protection_domain *domain);
static void detach_device(struct device *dev);
-static void update_and_flush_device_table(struct protection_domain *domain,
- struct domain_pgtable *pgtable);
/****************************************************************************
*
@@ -1502,7 +1500,7 @@ static bool increase_address_space(struct protection_domain *domain,
pgtable.root = pte;
pgtable.mode += 1;
- update_and_flush_device_table(domain, &pgtable);
+ amd_iommu_update_and_flush_device_table(domain);
domain_flush_complete(domain);
/*
@@ -1877,17 +1875,16 @@ static void free_gcr3_table(struct protection_domain *domain)
}
static void set_dte_entry(u16 devid, struct protection_domain *domain,
- struct domain_pgtable *pgtable,
bool ats, bool ppr)
{
u64 pte_root = 0;
u64 flags = 0;
u32 old_domid;
- if (pgtable->mode != PAGE_MODE_NONE)
- pte_root = iommu_virt_to_phys(pgtable->root);
+ if (domain->iop.mode != PAGE_MODE_NONE)
+ pte_root = iommu_virt_to_phys(domain->iop.root);
- pte_root |= (pgtable->mode & DEV_ENTRY_MODE_MASK)
+ pte_root |= (domain->iop.mode & DEV_ENTRY_MODE_MASK)
<< DEV_ENTRY_MODE_SHIFT;
pte_root |= DTE_FLAG_IR | DTE_FLAG_IW | DTE_FLAG_V | DTE_FLAG_TV;
@@ -1977,7 +1974,7 @@ static void do_attach(struct iommu_dev_data *dev_data,
/* Update device table */
amd_iommu_domain_get_pgtable(domain, &pgtable);
- set_dte_entry(dev_data->devid, domain, &pgtable,
+ set_dte_entry(dev_data->devid, domain,
ats, dev_data->iommu_v2);
clone_aliases(dev_data->pdev);
@@ -2284,22 +2281,20 @@ static int amd_iommu_domain_get_attr(struct iommu_domain *domain,
*
*****************************************************************************/
-static void update_device_table(struct protection_domain *domain,
- struct domain_pgtable *pgtable)
+static void update_device_table(struct protection_domain *domain)
{
struct iommu_dev_data *dev_data;
list_for_each_entry(dev_data, &domain->dev_list, list) {
- set_dte_entry(dev_data->devid, domain, pgtable,
+ set_dte_entry(dev_data->devid, domain,
dev_data->ats.enabled, dev_data->iommu_v2);
clone_aliases(dev_data->pdev);
}
}
-static void update_and_flush_device_table(struct protection_domain *domain,
- struct domain_pgtable *pgtable)
+void amd_iommu_update_and_flush_device_table(struct protection_domain *domain)
{
- update_device_table(domain, pgtable);
+ update_device_table(domain);
domain_flush_devices(domain);
}
@@ -2309,7 +2304,7 @@ static void update_domain(struct protection_domain *domain)
/* Update device table */
amd_iommu_domain_get_pgtable(domain, &pgtable);
- update_and_flush_device_table(domain, &pgtable);
+ amd_iommu_update_and_flush_device_table(domain);
/* Flush domain TLB(s) and wait for completion */
domain_flush_tlb_pde(domain);
--
2.17.1
next prev parent reply other threads:[~2020-12-15 7:38 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-15 7:36 [PATCH v4 00/13] iommu/amd: Add Generic IO Page Table Framework Support Suravee Suthikulpanit
2020-12-15 7:36 ` [PATCH v4 01/13] iommu/amd: Re-define amd_iommu_domain_encode_pgtable as inline Suravee Suthikulpanit
2020-12-15 7:36 ` [PATCH v4 02/13] iommu/amd: Prepare for generic IO page table framework Suravee Suthikulpanit
2020-12-15 7:36 ` [PATCH v4 03/13] iommu/amd: Move pt_root to struct amd_io_pgtable Suravee Suthikulpanit
2020-12-15 7:36 ` Suravee Suthikulpanit [this message]
2020-12-15 7:36 ` [PATCH v4 05/13] iommu/amd: Declare functions as extern Suravee Suthikulpanit
2020-12-15 7:36 ` [PATCH v4 06/13] iommu/amd: Move IO page table related functions Suravee Suthikulpanit
2020-12-15 7:36 ` [PATCH v4 07/13] iommu/amd: Restructure code for freeing page table Suravee Suthikulpanit
2020-12-15 7:37 ` [PATCH v4 08/13] iommu/amd: Remove amd_iommu_domain_get_pgtable Suravee Suthikulpanit
2020-12-15 7:37 ` [PATCH v4 09/13] iommu/amd: Rename variables to be consistent with struct io_pgtable_ops Suravee Suthikulpanit
2020-12-15 7:37 ` [PATCH v4 10/13] iommu/amd: Refactor fetch_pte to use struct amd_io_pgtable Suravee Suthikulpanit
2020-12-15 7:37 ` [PATCH v4 11/13] iommu/amd: Introduce iommu_v1_iova_to_phys Suravee Suthikulpanit
2020-12-15 7:37 ` [PATCH v4 12/13] iommu/amd: Introduce iommu_v1_map_page and iommu_v1_unmap_page Suravee Suthikulpanit
2020-12-15 7:37 ` [PATCH v4 13/13] iommu/amd: Adopt IO page table framework for AMD IOMMU v1 page table Suravee Suthikulpanit
2021-01-04 11:01 ` [PATCH v4 00/13] iommu/amd: Add Generic IO Page Table Framework Support Suravee Suthikulpanit
2021-01-27 12:06 ` Joerg Roedel
2021-01-27 13:37 ` Suravee Suthikulpanit
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