From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40B5BC433E6 for ; Tue, 5 Jan 2021 16:38:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1BB6522CE3 for ; Tue, 5 Jan 2021 16:38:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729276AbhAEQhv (ORCPT ); Tue, 5 Jan 2021 11:37:51 -0500 Received: from foss.arm.com ([217.140.110.172]:57260 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728499AbhAEQhu (ORCPT ); Tue, 5 Jan 2021 11:37:50 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 505A41396; Tue, 5 Jan 2021 08:37:05 -0800 (PST) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.195.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 709E23F70D; Tue, 5 Jan 2021 08:37:03 -0800 (PST) From: Andre Przywara To: Will Deacon , Catalin Marinas , Ard Biesheuvel , Russell King , Marc Zyngier Cc: Theodore Ts'o , Sudeep Holla , Mark Rutland , Mark Brown , Lorenzo Pieralisi , Linus Walleij , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org Subject: [PATCH v5 3/5] ARM: implement support for SMCCC TRNG entropy source Date: Tue, 5 Jan 2021 16:36:50 +0000 Message-Id: <20210105163652.23646-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210105163652.23646-1-andre.przywara@arm.com> References: <20210105163652.23646-1-andre.przywara@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ard Biesheuvel Implement arch_get_random_seed_*() for ARM based on the firmware or hypervisor provided entropy source described in ARM DEN0098. This will make the kernel's random number generator consume entropy provided by this interface, at early boot, and periodically at runtime when reseeding. Cc: Linus Walleij Cc: Russell King Signed-off-by: Ard Biesheuvel [Andre: rework to be initialised by the SMCCC firmware driver] Signed-off-by: Andre Przywara Reviewed-by: Linus Walleij --- arch/arm/Kconfig | 4 ++ arch/arm/include/asm/archrandom.h | 64 +++++++++++++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 138248999df7..bfe642510b0a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1644,6 +1644,10 @@ config STACKPROTECTOR_PER_TASK Enable this option to switch to a different method that uses a different canary value for each task. +config ARCH_RANDOM + def_bool y + depends on HAVE_ARM_SMCCC_DISCOVERY + endmenu menu "Boot options" diff --git a/arch/arm/include/asm/archrandom.h b/arch/arm/include/asm/archrandom.h index a8e84ca5c2ee..f3e96a5b65f8 100644 --- a/arch/arm/include/asm/archrandom.h +++ b/arch/arm/include/asm/archrandom.h @@ -2,9 +2,73 @@ #ifndef _ASM_ARCHRANDOM_H #define _ASM_ARCHRANDOM_H +#ifdef CONFIG_ARCH_RANDOM + +#include +#include + +#define ARM_SMCCC_TRNG_MIN_VERSION 0x10000UL + +extern bool smccc_trng_available; + +static inline bool __init smccc_probe_trng(void) +{ + struct arm_smccc_res res; + + arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_VERSION, &res); + if ((s32)res.a0 < 0) + return false; + if (res.a0 >= ARM_SMCCC_TRNG_MIN_VERSION) { + /* double check that the 32-bit flavor is available */ + arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_FEATURES, + ARM_SMCCC_TRNG_RND32, + &res); + if ((s32)res.a0 >= 0) + return true; + } + + return false; +} + +static inline bool __must_check arch_get_random_long(unsigned long *v) +{ + return false; +} + +static inline bool __must_check arch_get_random_int(unsigned int *v) +{ + return false; +} + +static inline bool __must_check arch_get_random_seed_long(unsigned long *v) +{ + struct arm_smccc_res res; + + if (smccc_trng_available) { + arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_RND32, 8 * sizeof(*v), &res); + + if (res.a0 != 0) + return false; + + *v = res.a3; + return true; + } + + return false; +} + +static inline bool __must_check arch_get_random_seed_int(unsigned int *v) +{ + return arch_get_random_seed_long((unsigned long *)v); +} + + +#else /* !CONFIG_ARCH_RANDOM */ + static inline bool __init smccc_probe_trng(void) { return false; } +#endif /* CONFIG_ARCH_RANDOM */ #endif /* _ASM_ARCHRANDOM_H */ -- 2.17.1