From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C91FC43331 for ; Thu, 14 Jan 2021 12:41:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F21FF23A53 for ; Thu, 14 Jan 2021 12:41:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728812AbhANMlq (ORCPT ); Thu, 14 Jan 2021 07:41:46 -0500 Received: from mail.kernel.org ([198.145.29.99]:59094 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726376AbhANMlg (ORCPT ); Thu, 14 Jan 2021 07:41:36 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 6AA8823A59; Thu, 14 Jan 2021 12:40:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1610628055; bh=d2Z8NCxe2fjDv1yv6SP6SbppuTV2JP+64LTQ3exydYw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XpszY4+xUiS/+/IDkKJ6WZutQaQ/A0jvizbsHLlVMcTwiG0zbTq3A5fdNG5r65JmC eFiFYqpCvMm4tD2fjMV8czwCXDij++99NbQ1vxLpG7yYkehAakH/wKl2Y9oSe5S1sN 1d7aYm/mlyP6qDoI/3EVyLsU86Gs0CrLMRkOwmnkmpw+40NTZ134TfME15Al53N3oD ubmOcPhzL9aEf6aZSqyBi7ZXWPMlK6I6FCjYxkY6BpsRbvgAmm3IpukXUcleayFLxM NG17j+cZWKY4qcl11iM0g4TuitciGOa0xg75k3HYn979RIKv12oPjQ+WIhJ0YVMh2/ FLZgvhERio6cQ== Received: by pali.im (Postfix) id 8A18B7CA; Thu, 14 Jan 2021 13:40:53 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Gregory Clement , Andrew Lunn , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: =?UTF-8?q?Marek=20Beh=C3=BAn?= , "Miquel Raynal" , "Tomasz Maciej Nowak" , "Luka Perkov" , "Andre Heider" , "Vladimir Vid" , "Russell King" , =?UTF-8?q?G=C3=A9rald=20Kerma?= , "Konstantin Porotchkin" Subject: [PATCH mvebu v2 03/10] clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM clock Date: Thu, 14 Jan 2021 13:40:25 +0100 Message-Id: <20210114124032.12765-4-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210114124032.12765-1-pali@kernel.org> References: <20210114124032.12765-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marek BehĂșn Remove the .set_parent method in clk_pm_cpu_ops. This method was supposed to be needed by the armada-37xx-cpufreq driver, but was never actually called due to wrong assumptions in the cpufreq driver. After this was fixed in the cpufreq driver, this method is not needed anymore. Signed-off-by: Marek BehĂșn Fixes: 2089dc33ea0e ("clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks") Cc: Gregory CLEMENT Cc: Miquel Raynal --- drivers/clk/mvebu/armada-37xx-periph.c | 28 -------------------------- 1 file changed, 28 deletions(-) diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c index f5746f9ea929..6507bd2c5f31 100644 --- a/drivers/clk/mvebu/armada-37xx-periph.c +++ b/drivers/clk/mvebu/armada-37xx-periph.c @@ -440,33 +440,6 @@ static u8 clk_pm_cpu_get_parent(struct clk_hw *hw) return val; } -static int clk_pm_cpu_set_parent(struct clk_hw *hw, u8 index) -{ - struct clk_pm_cpu *pm_cpu = to_clk_pm_cpu(hw); - struct regmap *base = pm_cpu->nb_pm_base; - int load_level; - - /* - * We set the clock parent only if the DVFS is available but - * not enabled. - */ - if (IS_ERR(base) || armada_3700_pm_dvfs_is_enabled(base)) - return -EINVAL; - - /* Set the parent clock for all the load level */ - for (load_level = 0; load_level < LOAD_LEVEL_NR; load_level++) { - unsigned int reg, mask, val, - offset = ARMADA_37XX_NB_TBG_SEL_OFF; - - armada_3700_pm_dvfs_update_regs(load_level, ®, &offset); - - val = index << offset; - mask = ARMADA_37XX_NB_TBG_SEL_MASK << offset; - regmap_update_bits(base, reg, mask, val); - } - return 0; -} - static unsigned long clk_pm_cpu_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { @@ -592,7 +565,6 @@ static int clk_pm_cpu_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops clk_pm_cpu_ops = { .get_parent = clk_pm_cpu_get_parent, - .set_parent = clk_pm_cpu_set_parent, .round_rate = clk_pm_cpu_round_rate, .set_rate = clk_pm_cpu_set_rate, .recalc_rate = clk_pm_cpu_recalc_rate, -- 2.20.1