From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Tiezhu Yang <yangtiezhu@loongson.cn>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
Xuefeng Li <lixuefeng@loongson.cn>,
David Daney <david.daney@cavium.com>,
Ralf Baechle <ralf@linux-mips.org>,
Archer Yan <ayan@wavecomp.com>
Subject: Re: [PATCH 1/3] MIPS: kernel: Support extracting off-line stack traces from user-space with perf
Date: Wed, 3 Feb 2021 11:40:09 +0100 [thread overview]
Message-ID: <20210203104009.GE7586@alpha.franken.de> (raw)
In-Reply-To: <7c081c6f-bf47-353d-95c0-52e8640dc938@loongson.cn>
On Mon, Feb 01, 2021 at 08:56:06PM +0800, Tiezhu Yang wrote:
> On 02/01/2021 06:43 PM, Thomas Bogendoerfer wrote:
> > On Tue, Dec 29, 2020 at 08:55:59PM +0800, Tiezhu Yang wrote:
> > > +++ b/arch/mips/include/uapi/asm/perf_regs.h
> > > @@ -0,0 +1,42 @@
> > > +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
> > > +#ifndef _ASM_MIPS_PERF_REGS_H
> > > +#define _ASM_MIPS_PERF_REGS_H
> > > +
> > > +enum perf_event_mips_regs {
> > > + PERF_REG_MIPS_PC,
> > > + PERF_REG_MIPS_R1,
> > > + PERF_REG_MIPS_R2,
> > > + PERF_REG_MIPS_R3,
> > > + PERF_REG_MIPS_R4,
> > > + PERF_REG_MIPS_R5,
> > > + PERF_REG_MIPS_R6,
> > > + PERF_REG_MIPS_R7,
> > > + PERF_REG_MIPS_R8,
> > > + PERF_REG_MIPS_R9,
> > > + PERF_REG_MIPS_R10,
> > > + PERF_REG_MIPS_R11,
> > > + PERF_REG_MIPS_R12,
> > > + PERF_REG_MIPS_R13,
> > > + PERF_REG_MIPS_R14,
> > > + PERF_REG_MIPS_R15,
> > > + PERF_REG_MIPS_R16,
> > > + PERF_REG_MIPS_R17,
> > > + PERF_REG_MIPS_R18,
> > > + PERF_REG_MIPS_R19,
> > > + PERF_REG_MIPS_R20,
> > > + PERF_REG_MIPS_R21,
> > > + PERF_REG_MIPS_R22,
> > > + PERF_REG_MIPS_R23,
> > > + PERF_REG_MIPS_R24,
> > > + PERF_REG_MIPS_R25,
> > > + /*
> > > + * 26 and 27 are k0 and k1, they are always clobbered thus not
> > > + * stored.
> > > + */
> > haveing this hole here make all code more complicated. Does it hurt
> > to have R26 and R27 in the list ?
>
> I think there is no effect if have R26 and R27 in the list.
>
> In the perf_reg_value(), PERF_REG_MIPS_R{26,27} are default case.
why make them special ? After all they are real registers and are only
defined special by current ABIs.
> Should I modify enum perf_event_mips_regs to add R26 and R27,
> and then send v2?
yes please.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
next prev parent reply other threads:[~2021-02-03 10:41 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-29 12:55 [PATCH 0/3] Add some perf support for mips Tiezhu Yang
2020-12-29 12:55 ` [PATCH 1/3] MIPS: kernel: Support extracting off-line stack traces from user-space with perf Tiezhu Yang
2021-01-04 10:59 ` Peter Zijlstra
2021-01-05 3:45 ` Jiaxun Yang
2021-01-05 10:18 ` Peter Zijlstra
2021-01-27 21:15 ` Thomas Bogendoerfer
2021-01-29 2:48 ` Tiezhu Yang
2021-01-29 17:56 ` Arnaldo Carvalho de Melo
2021-01-29 17:58 ` Arnaldo Carvalho de Melo
2021-02-01 10:43 ` Thomas Bogendoerfer
2021-02-01 12:56 ` Tiezhu Yang
2021-02-03 10:40 ` Thomas Bogendoerfer [this message]
2021-02-03 13:12 ` Tiezhu Yang
2021-02-03 13:41 ` Thomas Bogendoerfer
2020-12-29 12:56 ` [PATCH 2/3] perf tools: Support mips unwinding and dwarf-regs Tiezhu Yang
2020-12-29 12:56 ` [PATCH 3/3] perf tools: Generate mips syscalls_n64.c syscall table Tiezhu Yang
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