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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Lyude Paul <lyude@redhat.com>
Cc: intel-gfx@lists.freedesktop.org, David Airlie <airlied@linux.ie>,
	open list <linux-kernel@vger.kernel.org>,
	Yijun Shen <Yijun.Shen@dell.com>,
	"open list:DRM DRIVERS" <dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v5 1/4] drm/i915/gen9_bc: Recognize TGP PCH + CML combos
Date: Wed, 10 Feb 2021 22:19:43 -0500	[thread overview]
Message-ID: <20210211031943.GB82362@intel.com> (raw)
In-Reply-To: <20210209212832.1401815-2-lyude@redhat.com>

On Tue, Feb 09, 2021 at 04:28:28PM -0500, Lyude Paul wrote:
> Since Intel has introduced the gen9_bc platform, a combination of
> Tigerpoint PCHs and CML CPUs, let's recognize such platforms as valid and
> avoid WARNing on them.
> 
> Changes since v4:
> * Split this into it's own patch - vsyrjala
> 
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> [originally from Tejas's work]
> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
> Signed-off-by: Lyude Paul <lyude@redhat.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pch.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
> index 4813207fc053..7476f0e063c6 100644
> --- a/drivers/gpu/drm/i915/intel_pch.c
> +++ b/drivers/gpu/drm/i915/intel_pch.c
> @@ -121,7 +121,8 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
>  	case INTEL_PCH_TGP2_DEVICE_ID_TYPE:
>  		drm_dbg_kms(&dev_priv->drm, "Found Tiger Lake LP PCH\n");
>  		drm_WARN_ON(&dev_priv->drm, !IS_TIGERLAKE(dev_priv) &&
> -			    !IS_ROCKETLAKE(dev_priv));
> +			    !IS_ROCKETLAKE(dev_priv) &&
> +			    !IS_GEN9_BC(dev_priv));
>  		return PCH_TGP;
>  	case INTEL_PCH_JSP_DEVICE_ID_TYPE:
>  	case INTEL_PCH_JSP2_DEVICE_ID_TYPE:
> -- 
> 2.29.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-02-11  3:20 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20210209212832.1401815-1-lyude@redhat.com>
2021-02-09 21:28 ` [PATCH v5 1/4] drm/i915/gen9_bc: Recognize TGP PCH + CML combos Lyude Paul
2021-02-11  3:19   ` Rodrigo Vivi [this message]
2021-02-09 21:28 ` [PATCH v5 2/4] drm/i915/gen9_bc: Introduce TGP PCH DDC pin mappings Lyude Paul
2021-02-11  3:30   ` [Intel-gfx] " Rodrigo Vivi
2021-02-09 21:28 ` [PATCH v5 3/4] drm/i915/gen9_bc: Introduce HPD pin mappings for TGP PCH + CML combos Lyude Paul
2021-02-11  3:21   ` Rodrigo Vivi
2021-02-09 21:28 ` [PATCH v5 4/4] drm/i915/gen9_bc: Add W/A for missing STRAP config on " Lyude Paul
2021-02-11  3:23   ` Rodrigo Vivi
2021-02-11 23:30     ` [Intel-gfx] " Rodrigo Vivi

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