From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB997C4332E for ; Mon, 8 Mar 2021 10:56:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 846C0651FC for ; Mon, 8 Mar 2021 10:56:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231266AbhCHK4Y (ORCPT ); Mon, 8 Mar 2021 05:56:24 -0500 Received: from elvis.franken.de ([193.175.24.41]:57506 "EHLO elvis.franken.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231142AbhCHK4G (ORCPT ); Mon, 8 Mar 2021 05:56:06 -0500 Received: from uucp (helo=alpha) by elvis.franken.de with local-bsmtp (Exim 3.36 #1) id 1lJDYR-0003M5-01; Mon, 08 Mar 2021 11:56:03 +0100 Received: by alpha.franken.de (Postfix, from userid 1000) id D599DC12B6; Mon, 8 Mar 2021 11:54:37 +0100 (CET) Date: Mon, 8 Mar 2021 11:54:37 +0100 From: Thomas Bogendoerfer To: "Maciej W. Rozycki" Cc: "Jason A. Donenfeld" , "open list:BROADCOM NVRAM DRIVER" , LKML , Ralf Baechle , George Cherian , Huacai Chen , Jiaxun Yang , stable@vger.kernel.org Subject: Re: [PATCH] crypto: mips/poly1305 - enable for all MIPS processors Message-ID: <20210308105437.GB6622@alpha.franken.de> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 03, 2021 at 02:16:04AM +0100, Maciej W. Rozycki wrote: > The MIPS Poly1305 implementation is generic MIPS code written such as to > support down to the original MIPS I and MIPS III ISA for the 32-bit and > 64-bit variant respectively. Lift the current limitation then to enable > code for MIPSr1 ISA or newer processors only and have it available for > all MIPS processors. > > Signed-off-by: Maciej W. Rozycki > Fixes: a11d055e7a64 ("crypto: mips/poly1305 - incorporate OpenSSL/CRYPTOGAMS optimized implementation") > Cc: stable@vger.kernel.org # v5.5+ > --- > On Wed, 3 Mar 2021, Jason A. Donenfeld wrote: > > > >> Would you mind sending this for 5.12 in an rc at some point, rather > > >> than waiting for 5.13? I'd like to see this backported to 5.10 and 5.4 > > >> for OpenWRT. > > > > > > why is this so important for OpenWRT ? Just to select CRYPTO_POLY1305_MIPS > > > ? > > > > Yes. The performance boost on Octeon is significant for WireGuard users. > > But that's the wrong fix for that purpose. I've skimmed over that module > and there's nothing MIPS64-specific there. In fact it's plain generic > MIPS assembly, with some R2 optimisations enabled where applicable but not > necessary (and then R6 tweaks, but that's irrelevant here). > > As a matter of interest I have just built it successfully for a MIPS I > DECstation configuration: > > $ file arch/mips/crypto/poly1305-mips.ko > arch/mips/crypto/poly1305-mips.ko: ELF 32-bit LSB relocatable, MIPS, MIPS-I version 1 (SYSV), BuildID[sha1]=d36384d94f60ba7deff638ca8a24500120b45b56, not stripped > $ > > Patch included, please apply. > > So while your change is surely right, what you want is this really. > > Maciej > --- > arch/mips/crypto/Makefile | 4 ++-- > crypto/Kconfig | 2 +- > drivers/net/Kconfig | 2 +- > 3 files changed, 4 insertions(+), 4 deletions(-) applied to mips-fixes. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]