Re: [PATCH v3 1/5] dt-bindings: reset: IMX8MQ VPU reset

Rob Herring
2021-03-08T18:24:41Z

On Mon, Mar 01, 2021 at 04:17:50PM +0100, Benjamin Gaignard wrote:
> Document bindings for IMX8MQ VPU reset hardware block
>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
> .../bindings/reset/fsl,imx8mq-vpu-reset.yaml | 54 +++++++++++++++++++
> include/dt-bindings/reset/imx8mq-vpu-reset.h | 16 ++++++
> 2 files changed, 70 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml
> create mode 100644 include/dt-bindings/reset/imx8mq-vpu-reset.h
>
> diff --git a/Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml b/Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml
> new file mode 100644
> index 000000000000..00020421c0e3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/reset/fsl,imx8mq-vpu-reset.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8MQ VPU Reset Controller
> +
> +maintainers:
> + - Benjamin Gaignard <benjamin.gaignard@collabora.com>
> +
> +description: |
> + The VPU reset controller is used to reset the video processor
> + unit peripherals. Device nodes that need access to reset lines should
> + specify them as a reset phandle in their corresponding node as
> + specified in reset.txt.
> +
> + For list of all valid reset indices see
> + <dt-bindings/reset/imx8mq-vpu-reset.h> for i.MX8MQ.
> +
> +properties:
> + compatible:
> + items:
> + - const: fsl,imx8mq-vpu-reset
> + - const: syscon

Is there other functionality in the block? If so, add some details in
'description' above.

> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 3

Need to say what each clock is.

> +
> + '#reset-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - '#reset-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/imx8mq-clock.h>
> +
> + vpu-reset@38320000 {

reset-controller@...

> + compatible = "fsl,imx8mq-vpu-reset", "syscon";
> + reg = <0x38320000 0x10000>;
> + clocks = <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> + #reset-cells = <1>;
> + };
> diff --git a/include/dt-bindings/reset/imx8mq-vpu-reset.h b/include/dt-bindings/reset/imx8mq-vpu-reset.h
> new file mode 100644
> index 000000000000..efcbe18177fe
> --- /dev/null
> +++ b/include/dt-bindings/reset/imx8mq-vpu-reset.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2021, Collabora
> + *
> + * i.MX7 System Reset Controller (SRC) driver
> + *
> + * Author: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> + */
> +
> +#ifndef DT_BINDINGS_VPU_RESET_IMX8MQ
> +#define DT_BINDINGS_VPU_RESET_IMX8MQ
> +
> +#define IMX8MQ_RESET_VPU_RESET_G1 0
> +#define IMX8MQ_RESET_VPU_RESET_G2 1
> +
> +#endif
> --
> 2.25.1
>