Re: [PATCH v5 1/1] iio: adc: ad7124: allow more than 8 channels

[kernel test robot <lkp@intel.com>]

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Hi,

I love your patch! Perhaps something to improve:

[auto build test WARNING on iio/togreg]
[also build test WARNING on linux/master linus/master v5.12-rc2 next-20210311]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/alexandru-tachici-analog-com/iio-adc-ad7124-allow-more-than-8-channels/20210311-170758
base:   https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg
config: arc-randconfig-r015-20210311 (attached as .config)
compiler: arc-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/4634217a2ad675ef3f84048e7abaf355e05ca781
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review alexandru-tachici-analog-com/iio-adc-ad7124-allow-more-than-8-channels/20210311-170758
        git checkout 4634217a2ad675ef3f84048e7abaf355e05ca781
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/iio/adc/ad7124.c: In function 'ad7124_setup':
>> drivers/iio/adc/ad7124.c:810:15: warning: variable 'val' set but not used [-Wunused-but-set-variable]
     810 |  unsigned int val, fclk, power_mode;
         |               ^~~


vim +/val +810 drivers/iio/adc/ad7124.c

b3af341bbd9662 Stefan Popa       2018-11-13  807  
b3af341bbd9662 Stefan Popa       2018-11-13  808  static int ad7124_setup(struct ad7124_state *st)
b3af341bbd9662 Stefan Popa       2018-11-13  809  {
b3af341bbd9662 Stefan Popa       2018-11-13 @810  	unsigned int val, fclk, power_mode;
4634217a2ad675 Alexandru Tachici 2021-03-11  811  	int i, ret;
b3af341bbd9662 Stefan Popa       2018-11-13  812  
b3af341bbd9662 Stefan Popa       2018-11-13  813  	fclk = clk_get_rate(st->mclk);
b3af341bbd9662 Stefan Popa       2018-11-13  814  	if (!fclk)
b3af341bbd9662 Stefan Popa       2018-11-13  815  		return -EINVAL;
b3af341bbd9662 Stefan Popa       2018-11-13  816  
b3af341bbd9662 Stefan Popa       2018-11-13  817  	/* The power mode changes the master clock frequency */
b3af341bbd9662 Stefan Popa       2018-11-13  818  	power_mode = ad7124_find_closest_match(ad7124_master_clk_freq_hz,
b3af341bbd9662 Stefan Popa       2018-11-13  819  					ARRAY_SIZE(ad7124_master_clk_freq_hz),
b3af341bbd9662 Stefan Popa       2018-11-13  820  					fclk);
b3af341bbd9662 Stefan Popa       2018-11-13  821  	if (fclk != ad7124_master_clk_freq_hz[power_mode]) {
b3af341bbd9662 Stefan Popa       2018-11-13  822  		ret = clk_set_rate(st->mclk, fclk);
b3af341bbd9662 Stefan Popa       2018-11-13  823  		if (ret)
b3af341bbd9662 Stefan Popa       2018-11-13  824  			return ret;
b3af341bbd9662 Stefan Popa       2018-11-13  825  	}
b3af341bbd9662 Stefan Popa       2018-11-13  826  
b3af341bbd9662 Stefan Popa       2018-11-13  827  	/* Set the power mode */
b3af341bbd9662 Stefan Popa       2018-11-13  828  	st->adc_control &= ~AD7124_ADC_CTRL_PWR_MSK;
b3af341bbd9662 Stefan Popa       2018-11-13  829  	st->adc_control |= AD7124_ADC_CTRL_PWR(power_mode);
b3af341bbd9662 Stefan Popa       2018-11-13  830  	ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control);
b3af341bbd9662 Stefan Popa       2018-11-13  831  	if (ret < 0)
b3af341bbd9662 Stefan Popa       2018-11-13  832  		return ret;
b3af341bbd9662 Stefan Popa       2018-11-13  833  
4634217a2ad675 Alexandru Tachici 2021-03-11  834  	mutex_init(&st->cfgs_lock);
4634217a2ad675 Alexandru Tachici 2021-03-11  835  	INIT_KFIFO(st->live_cfgs_fifo);
b3af341bbd9662 Stefan Popa       2018-11-13  836  	for (i = 0; i < st->num_channels; i++) {
4634217a2ad675 Alexandru Tachici 2021-03-11  837  		val = st->channels[i].ain;
b3af341bbd9662 Stefan Popa       2018-11-13  838  
4634217a2ad675 Alexandru Tachici 2021-03-11  839  		ret = ad7124_init_config_vref(st, &st->channels[i].cfg);
b3af341bbd9662 Stefan Popa       2018-11-13  840  		if (ret < 0)
b3af341bbd9662 Stefan Popa       2018-11-13  841  			return ret;
b3af341bbd9662 Stefan Popa       2018-11-13  842  
b3af341bbd9662 Stefan Popa       2018-11-13  843  		/*
b3af341bbd9662 Stefan Popa       2018-11-13  844  		 * 9.38 SPS is the minimum output data rate supported
b3af341bbd9662 Stefan Popa       2018-11-13  845  		 * regardless of the selected power mode. Round it up to 10 and
4634217a2ad675 Alexandru Tachici 2021-03-11  846  		 * set all channels to this default value.
b3af341bbd9662 Stefan Popa       2018-11-13  847  		 */
4634217a2ad675 Alexandru Tachici 2021-03-11  848  		ad7124_set_channel_odr(st, i, 10);
b3af341bbd9662 Stefan Popa       2018-11-13  849  	}
b3af341bbd9662 Stefan Popa       2018-11-13  850  
b3af341bbd9662 Stefan Popa       2018-11-13  851  	return ret;
b3af341bbd9662 Stefan Popa       2018-11-13  852  }
b3af341bbd9662 Stefan Popa       2018-11-13  853  

---
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