From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7C62C433E9 for ; Sun, 14 Mar 2021 16:02:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A2B9E64EB6 for ; Sun, 14 Mar 2021 16:02:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234417AbhCNQBw (ORCPT ); Sun, 14 Mar 2021 12:01:52 -0400 Received: from mga14.intel.com ([192.55.52.115]:7174 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234147AbhCNQAv (ORCPT ); Sun, 14 Mar 2021 12:00:51 -0400 IronPort-SDR: F0xxKXPS24/gmsZOWfzxeEyxF3SSIicLkPeLLYPpNE4sLpZrUkVAKP+m+8KK7++M1AmA9xjClI FMOWC0jD2vaQ== X-IronPort-AV: E=McAfee;i="6000,8403,9923"; a="188360752" X-IronPort-AV: E=Sophos;i="5.81,248,1610438400"; d="scan'208";a="188360752" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Mar 2021 09:00:51 -0700 IronPort-SDR: AS0clyGmnlbTkUycgGMjBRDp+/PZY91szU56X7mnOVKQNCWm0aNH7wH22LeS6/hAydujrVaVn0 AzsY76KDVI+A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,248,1610438400"; d="scan'208";a="439530726" Received: from clx-ap-likexu.sh.intel.com ([10.239.48.108]) by FMSMGA003.fm.intel.com with ESMTP; 14 Mar 2021 09:00:49 -0700 From: Like Xu To: Paolo Bonzini , Sean Christopherson Cc: Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, x86@kernel.org, wei.w.wang@intel.com, linux-kernel@vger.kernel.org, Like Xu Subject: [PATCH v4 09/11] KVM: x86: Expose Architectural LBR CPUID leaf Date: Sun, 14 Mar 2021 23:52:22 +0800 Message-Id: <20210314155225.206661-10-like.xu@linux.intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210314155225.206661-1-like.xu@linux.intel.com> References: <20210314155225.206661-1-like.xu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If CPUID.(EAX=07H, ECX=0):EDX[19] is set to 1, then KVM supports Arch LBRs and CPUID leaf 01CH indicates details of the Arch LBRs capabilities. Currently, KVM only supports the current host LBR depth for guests, which is also the maximum supported depth on the host. Signed-off-by: Like Xu --- arch/x86/kvm/cpuid.c | 25 ++++++++++++++++++++++++- arch/x86/kvm/vmx/vmx.c | 2 ++ 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index b4247f821277..4473324fe7be 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -450,7 +450,7 @@ void kvm_set_cpu_caps(void) F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) | - F(SERIALIZE) | F(TSXLDTRK) | F(AVX512_FP16) + F(SERIALIZE) | F(TSXLDTRK) | F(AVX512_FP16) | F(ARCH_LBR) ); /* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */ @@ -805,6 +805,29 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) goto out; } break; + /* Architectural LBR */ + case 0x1c: + { + u64 lbr_depth_mask = entry->eax & 0xff; + + if (!lbr_depth_mask || !kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR)) { + entry->eax = entry->ebx = entry->ecx = entry->edx = 0; + break; + } + + /* + * KVM only exposes the maximum supported depth, + * which is also the fixed value used on the host. + * + * KVM doesn't allow VMM user sapce to adjust depth + * per guest, because the guest LBR emulation depends + * on the implementation of the host LBR driver. + */ + lbr_depth_mask = 1UL << (fls(lbr_depth_mask) - 1); + entry->eax &= ~0xff; + entry->eax |= lbr_depth_mask; + break; + } case KVM_CPUID_SIGNATURE: { static const char signature[12] = "KVMKVMKVM\0\0"; const u32 *sigptr = (const u32 *)signature; diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 43e73ea12ba6..03c0faf16a7d 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -7295,6 +7295,8 @@ static __init void vmx_set_cpu_caps(void) kvm_cpu_cap_clear(X86_FEATURE_INVPCID); if (vmx_pt_mode_is_host_guest()) kvm_cpu_cap_check_and_set(X86_FEATURE_INTEL_PT); + if (!cpu_has_vmx_arch_lbr()) + kvm_cpu_cap_clear(X86_FEATURE_ARCH_LBR); if (vmx_umip_emulated()) kvm_cpu_cap_set(X86_FEATURE_UMIP); -- 2.29.2