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[198.145.64.163]) by smtp.gmail.com with ESMTPSA id x1sm121803pje.40.2021.03.17.15.31.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Mar 2021 15:31:39 -0700 (PDT) Date: Wed, 17 Mar 2021 15:31:38 -0700 From: Kees Cook To: Mukesh Ojha Cc: linux-kernel@vger.kernel.org, anton@enomsg.org, ccross@android.com, tony.luck@intel.com Subject: Re: [RESEND PATCH v2 1/2] pstore: Add mem_type property DT parsing support Message-ID: <202103171523.23CAFD0E@keescook> References: <1614268817-7596-1-git-send-email-mojha@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1614268817-7596-1-git-send-email-mojha@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 25, 2021 at 09:30:16PM +0530, Mukesh Ojha wrote: > There could be a sceanario where we define some region > in normal memory and use them store to logs which is later > retrieved by bootloader during warm reset. > > In this scenario, we wanted to treat this memory as normal > cacheable memory instead of default behaviour which > is an overhead. Making it cacheable could improve > performance. > > This commit gives control to change mem_type from Device > tree, and also documents the value for normal memory. > > Signed-off-by: Mukesh Ojha > --- > Changes in v2: > - if-else converted to switch case > - updated MODULE_PARM_DESC with new memory type. > - default setting is still intact. > > Documentation/admin-guide/ramoops.rst | 4 +++- > fs/pstore/ram.c | 3 ++- > fs/pstore/ram_core.c | 18 ++++++++++++++++-- > 3 files changed, 21 insertions(+), 4 deletions(-) > > diff --git a/Documentation/admin-guide/ramoops.rst b/Documentation/admin-guide/ramoops.rst > index b0a1ae7..8f107d8 100644 > --- a/Documentation/admin-guide/ramoops.rst > +++ b/Documentation/admin-guide/ramoops.rst > @@ -3,7 +3,7 @@ Ramoops oops/panic logger > > Sergiu Iordache > > -Updated: 17 November 2011 > +Updated: 10 Feb 2021 > > Introduction > ------------ > @@ -30,6 +30,8 @@ mapping to pgprot_writecombine. Setting ``mem_type=1`` attempts to use > depends on atomic operations. At least on ARM, pgprot_noncached causes the > memory to be mapped strongly ordered, and atomic operations on strongly ordered > memory are implementation defined, and won't work on many ARMs such as omaps. > +Setting ``mem_type=2`` attempts to treat the memory region as normal memory, > +which enables full cache on it. This can improve the performance. > > The memory area is divided into ``record_size`` chunks (also rounded down to > power of two) and each kmesg dump writes a ``record_size`` chunk of > diff --git a/fs/pstore/ram.c b/fs/pstore/ram.c > index ca6d8a8..af4ca6a4 100644 > --- a/fs/pstore/ram.c > +++ b/fs/pstore/ram.c > @@ -56,7 +56,7 @@ MODULE_PARM_DESC(mem_size, > static unsigned int mem_type; > module_param(mem_type, uint, 0400); > MODULE_PARM_DESC(mem_type, > - "set to 1 to try to use unbuffered memory (default 0)"); > + "set to 1 to use unbuffered memory, 2 for cached memory (default 0)"); I'd like to be as explicit as possible (0 wasn't listed), so about this: "memory type: 0=write-combined (default), 1=unbuffered, 2=cached" > static int ramoops_max_reason = -1; > module_param_named(max_reason, ramoops_max_reason, int, 0400); > @@ -666,6 +666,7 @@ static int ramoops_parse_dt(struct platform_device *pdev, > field = value; \ > } > > + parse_u32("mem-type", pdata->record_size, pdata->mem_type); Please update the documentation at: Documentation/devicetree/bindings/reserved-memory/ramoops.txt (and please move and update the language about "unbuffered" being deprecated like "no-dump-oops", so that it's clear what happens when both are specified -- "mem-type" overrides "unbuffered".) > parse_u32("record-size", pdata->record_size, 0); > parse_u32("console-size", pdata->console_size, 0); > parse_u32("ftrace-size", pdata->ftrace_size, 0); > diff --git a/fs/pstore/ram_core.c b/fs/pstore/ram_core.c > index aa8e0b6..0da012f 100644 > --- a/fs/pstore/ram_core.c > +++ b/fs/pstore/ram_core.c > @@ -396,6 +396,10 @@ void persistent_ram_zap(struct persistent_ram_zone *prz) > persistent_ram_update_header_ecc(prz); > } > > +#define MEM_TYPE_WCOMBINE 0 > +#define MEM_TYPE_NONCACHED 1 > +#define MEM_TYPE_NORMAL 2 > + > static void *persistent_ram_vmap(phys_addr_t start, size_t size, > unsigned int memtype) > { > @@ -409,10 +413,20 @@ static void *persistent_ram_vmap(phys_addr_t start, size_t size, > page_start = start - offset_in_page(start); > page_count = DIV_ROUND_UP(size + offset_in_page(start), PAGE_SIZE); > > - if (memtype) > + switch (memtype) { > + case MEM_TYPE_NORMAL: > + prot = PAGE_KERNEL; > + break; > + case MEM_TYPE_NONCACHED: > prot = pgprot_noncached(PAGE_KERNEL); > - else > + break; > + case MEM_TYPE_WCOMBINE: > prot = pgprot_writecombine(PAGE_KERNEL); > + break; > + default: > + pr_err("invalid memory type\n"); This should be more verbose: pr_err("invalid mem_type=%d\n", memtype); > + return NULL; > + } > > pages = kmalloc_array(page_count, sizeof(struct page *), GFP_KERNEL); > if (!pages) { With those changes, it looks good to me. Thanks! -- Kees Cook