Re: [PATCH 0/9] intel_pmc_core: Add sub-state requirements and mode latching support

Hans de Goede
2021-04-07T14:50:22Z

Hi,

On 4/1/21 5:05 AM, David E. Box wrote:
> - Patch 1 and 2 remove the use of the global struct pmc_dev
> - Patches 3-7 add support for reading low power mode sub-state
> requirements, latching sub-state status on different low power mode
> events, and displaying the sub-state residency in microseconds
> - Patch 8 adds missing LTR IPs for TGL
> - Patch 9 adds support for ADL-P which is based on TGL
>
> Applied on top of latest 5.12-rc2 based hans-review/review-hans

Thnak you for this series, this mostly is fine, a few small remarks
on patch 5/9 and 7/9 if you can send a v2 addressing those, then
this is ready for merging.

Regards,

Hans

>
> David E. Box (4):
> platform/x86: intel_pmc_core: Don't use global pmcdev in quirks
> platform/x86: intel_pmc_core: Remove global struct pmc_dev
> platform/x86: intel_pmc_core: Add option to set/clear LPM mode
> platform/x86: intel_pmc_core: Add support for Alder Lake PCH-P
>
> Gayatri Kammela (5):
> platform/x86: intel_pmc_core: Handle sub-states generically
> platform/x86: intel_pmc_core: Show LPM residency in microseconds
> platform/x86: intel_pmc_core: Get LPM requirements for Tiger Lake
> platform/x86: intel_pmc_core: Add requirements file to debugfs
> platform/x86: intel_pmc_core: Add LTR registers for Tiger Lake
>
> drivers/platform/x86/intel_pmc_core.c | 359 +++++++++++++++++++++++---
> drivers/platform/x86/intel_pmc_core.h | 47 +++-
> 2 files changed, 370 insertions(+), 36 deletions(-)
>