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[2a01:cb00:8bd:2700:41a0:a0f4:308e:afc0]) by smtp.gmail.com with ESMTPSA id l14sm17173952wrm.77.2021.04.07.14.21.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Apr 2021 14:21:30 -0700 (PDT) From: Adrien Grassein Cc: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, l.stach@pengutronix.de, Anson.Huang@nxp.com, krzk@kernel.org, peng.fan@nxp.com, aisheng.dong@nxp.com, qiangqing.zhang@nxp.com, alice.guo@nxp.com, aford173@gmail.com, agx@sigxcpu.org, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Adrien Grassein Subject: [PATCH v1 4/7] dt-bindings: power: fsl,imx-gpcv2: add definitions for i.MX8MM Date: Wed, 7 Apr 2021 23:21:19 +0200 Message-Id: <20210407212122.626137-5-adrien.grassein@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210407212122.626137-1-adrien.grassein@gmail.com> References: <20210407212122.626137-1-adrien.grassein@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update documentation for i.MX8MM. Signed-off-by: Adrien Grassein --- .../bindings/power/fsl,imx-gpcv2.yaml | 7 +++++-- include/dt-bindings/power/imx8mm-power.h | 21 +++++++++++++++++++ 2 files changed, 26 insertions(+), 2 deletions(-) create mode 100644 include/dt-bindings/power/imx8mm-power.h diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml index a96e6dbf1858..04928a173698 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml @@ -26,6 +26,7 @@ properties: enum: - fsl,imx7d-gpc - fsl,imx8mq-gpc + - fsl,imx8mm-pgc reg: maxItems: 1 @@ -52,8 +53,10 @@ properties: reg: description: | Power domain index. Valid values are defined in - include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and - include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc + include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc, + include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc and + include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc + maxItems: 1 clocks: diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h new file mode 100644 index 000000000000..bec25fd32394 --- /dev/null +++ b/include/dt-bindings/power/imx8mm-power.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (C) 2021 Adrien Grassein + */ + +#ifndef __DT_BINDINGS_IMX8MM_POWER_H__ +#define __DT_BINDINGS_IMX8MM_POWER_H__ + +#define IMX8MM_POWER_DOMAIN_HSIOMIX 0 +#define IMX8MM_POWER_DOMAIN_PCIE1 1 +#define IMX8MM_POWER_DOMAIN_USB_OTG1 2 +#define IMX8MM_POWER_DOMAIN_USB_OTG2 3 +#define IMX8MM_POWER_DOMAIN_GPU 4 +#define IMX8MM_POWER_DOMAIN_VPU 5 +#define IMX8MM_POWER_DOMAIN_VPU_G1 6 +#define IMX8MM_POWER_DOMAIN_VPU_G2 7 +#define IMX8MM_POWER_DOMAIN_VPU_H1 8 +#define IMX8MM_POWER_DOMAIN_DISPLAY 9 +#define IMX8MM_POWER_DOMAIN_MIPI 10 + +#endif -- 2.25.1