[PATCH 2/3] fpga: region: Add fpga-region property 'power-domains'

Nava kishore Manne
2021-04-02T09:29:06Z

Add fpga-region property 'power-domains' to allow to handle
the FPGA/PL power domins.

dt-bindings: fpga: Enable PM generic domain support

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
.../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt
index e811cf825019..969ca53bb65e 100644
--- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
+++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
@@ -196,6 +196,20 @@ Optional properties:
- config-complete-timeout-us : The maximum time in microseconds time for the
FPGA to go to operating mode after the region has been programmed.
- child nodes : devices in the FPGA after programming.
+- power-domains : A phandle and PM domain specifier as defined by bindings of
+ the power controller specified by phandle.
+Example:
+ fpga_full: fpga-full {
+ compatible = "fpga-region";
+ fpga-mgr = <&zynqmp_pcap>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ power-domains = <&zynqmp_firmware PL_PD>;
+ };
+
+ The PL_PD power domain will be turned on before loading the bitstream
+and turned off while removing/unloading the bitstream using overlays.

In the example below, when an overlay is applied targeting fpga-region0,
fpga_mgr is used to program the FPGA. Two bridges are controlled during
--
2.18.0