[PATCH 5.11 181/210] net/mlx5: Fix PBMC register mapping

Greg Kroah-Hartman
2021-04-12T09:38:44Z

From: Aya Levin <ayal@nvidia.com>

[ Upstream commit 534b1204ca4694db1093b15cf3e79a99fcb6a6da ]

Add reserved mapping to cover all the register in order to avoid setting
arbitrary values to newer FW which implements the reserved fields.

Fixes: 50b4a3c23646 ("net/mlx5: PPTB and PBMC register firmware command support")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
include/linux/mlx5/mlx5_ifc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 443dda54d851..6370ba10f1fd 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -10108,7 +10108,7 @@ struct mlx5_ifc_pbmc_reg_bits {

struct mlx5_ifc_bufferx_reg_bits buffer[10];

- u8 reserved_at_2e0[0x40];
+ u8 reserved_at_2e0[0x80];
};

struct mlx5_ifc_qtct_reg_bits {
--
2.30.2