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Fri, 30 Apr 2021 04:55:49 +0000 From: "Peng Fan (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Peng Fan Subject: [PATCH V2 2/4] Documentation: bindings: clk: Add bindings for i.MX BLK_CTL Date: Fri, 30 Apr 2021 13:27:44 +0800 Message-Id: <20210430052746.10815-3-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210430052746.10815-1-peng.fan@oss.nxp.com> References: <20210430052746.10815-1-peng.fan@oss.nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: HKAPR04CA0006.apcprd04.prod.outlook.com (2603:1096:203:d0::16) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by HKAPR04CA0006.apcprd04.prod.outlook.com (2603:1096:203:d0::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4087.25 via Frontend Transport; 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Signed-off-by: Peng Fan --- .../bindings/soc/imx/fsl,imx-blk-ctl.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml new file mode 100644 index 000000000000..a491b63de50c --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx-blk-ctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX BLK_CTL + +maintainers: + - Peng Fan + +description: + i.MX BLK_CTL is a conglomerate of different GPRs that are + dedicated to a specific subsystem. It usually contains + clocks and resets amongst other things. Here we take the clocks + and resets as virtual PDs, the reason we could not take it as + clock provider is there is A/B lock issue between power domain + and clock. + +properties: + compatible: + items: + - enum: + - fsl,imx8mm-dispmix-blk-ctl + - fsl,imx8mm-vpumix-blk-ctl + - const: syscon + + reg: + maxItems: 1 + + "#power-domain-cells": + const: 1 + + power-domains: + minItems: 1 + maxItems: 32 + + power-domain-names: + minItems: 1 + maxItems: 32 + + '#reset-cells': + const: 1 + + clocks: + minItems: 1 + maxItems: 32 + + clock-names: + minItems: 1 + maxItems: 32 + +required: + - compatible + - reg + - power-domains + +additionalProperties: false + +examples: + - | + #include + + dispmix_blk_ctl: blk-ctl@32e28000 { + compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon"; + reg = <0x32e28000 0x100>; + #power-domain-cells = <1>; + power-domains = <&pgc_dispmix>, <&pgc_mipi>; + power-domain-names = "dispmix", "mipi"; + clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>, + <&clk IMX8MM_CLK_DISP_APB_ROOT>; + clock-names = "disp", "axi", "apb"; + }; -- 2.30.0