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[222.224.229.1]) by smtp.gmail.com with ESMTPSA id l18sm10350717pjq.33.2021.05.15.00.58.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 May 2021 00:58:15 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Peter Zijlstra , Stafford Horne , Jonas Bonn , Stefan Kristiansson Subject: [PATCH] openrisc: Define memory barrier mb Date: Sat, 15 May 2021 16:58:08 +0900 Message-Id: <20210515075810.163206-1-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peter Zijlstra This came up in the discussion of the requirements of qspinlock on an architecture. OpenRISC uses qspinlock, but it was noticed that the memmory barrier was not defined. Peter defined it in the mail thread writing: As near as I can tell this should do. The arch spec only lists this one instruction and the text makes it sound like a completion barrier. This is correct so applying this patch. Signed-off-by: Peter Zijlstra [shorne@gmail.com:Turned the mail into a patch] Signed-off-by: Stafford Horne --- I just applied the patch posted by Peter in the mail as is hence it is labeled from peter. This also required me to set the Signed-off-by to Peter. If there is any issue with that let me know. I tested this out on my single processor setup and it all works fine, it will take me some time to get my SMP setup up and running again to test the other patches, but I figured I would send this patch first. Also, I got delayed because I had to rebuild my main workstation after a hardware failure. arch/openrisc/include/asm/barrier.h | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 arch/openrisc/include/asm/barrier.h diff --git a/arch/openrisc/include/asm/barrier.h b/arch/openrisc/include/asm/barrier.h new file mode 100644 index 000000000000..7538294721be --- /dev/null +++ b/arch/openrisc/include/asm/barrier.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_BARRIER_H +#define __ASM_BARRIER_H + +#define mb() asm volatile ("l.msync" ::: "memory") + +#include + +#endif /* __ASM_BARRIER_H */ -- 2.31.1